Configurable mapping of timer channels to protection groups
AssigneeRenesas Electronics America Inc.
InventorJon Matthew Brabender
Life of this patent
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Abstract
An apparatus and method for mapping timer channels to protection groups. One embodiment of the method can be implemented in a microcontroller unit (MCU) that comprises a central processing unit (CPU) coupled to a plurality of timer channels and a plurality of programmable group output disable (PTGOD) circuits. The CPU can select a first group of the timer channels to respond to an assertion of a first output disable signal from a first of the PTGOD circuits. Each timer channel of the first group can disable an output signal in response to receiving the assertion of the first output disable signal.
Claims20
A method implemented in a microcontroller unit (MCU) that comprises a central processing unit (CPU) coupled to a plurality of timer channels and a plurality of programmable group output disable (PTGOD) circuits, the method comprising:
- the CPU selecting a first group of the timer channels to respond to an assertion of a first output disable signal from a first of the PTGOD circuits, wherein each timer channel of the first group disables an output signal in response to receiving the assertion of the first output disable signal.
A system comprising:
- microcontroller (MCU), wherein the MCU comprises:
- a central processing unit (CPU);
- a plurality of timer channels;
- a plurality of programmable group output disable (PTGOD) units;
- wherein the CPU is configured to select a first group of the timer channels to respond to an assertion of a first output disable signal from a first of the PTGOD units, wherein each timer channel of the first group disables an output signal in response to receiving the assertion of the first output disable signal.
A microcontroller comprising:
- a plurality of timer channels;
- a plurality of programmable group output disable (PTGOD) units;
- means for selecting a first group of the timer channels to respond to an assertion of a first output disable signal from a first of the PTGOD units, wherein each timer channel of the first group disables an output signal in response to receiving the assertion of the first output disable signal.
Dependencies are inferred from the claim text.