# US 2016/0260830 A1 · Semiconductor device

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 2016/0260830 A1
- Document ID: US20160260830A1
- Status: Published application
- Kind: A1
- Application number: 15/155,885
- Filed: 2016-05-16
- Published: 2016-09-08
- Earliest claimed: 2012-08-20
- Assignees: Rohm Co., Ltd.
- Applicants: Rohm Co., Ltd.
- Inventors: Yuki NAKANO; Ryota NAKAMURA; Hiroyuki SAKAIRI
- Web page: https://patentgrep.com/patent/US20160260830A1

## CPC

- H10D 62/109: {Reduced surface field [RESURF] PN junction structures}
- H10D 12/031: {of IGBTs}
- H10D 30/668: {having trench gate electrodes, e.g. UMOS transistors}
- H10D 62/115: {Dielectric isolations, e.g. air gaps}
- H10D 62/116: {adjoining the input or output regions of field-effect devices, e.g. adjoining source or drain regions}
- H10D 62/127: {of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs}
- H10D 62/151: {of IGFETs (of IGFETs having LDD or DDD structure H10D30/601; of thin film transistors H10D30/6713)}
- H10D 62/393: {Body regions of DMOS transistors or IGBTs (cell layout of DMOS H10D62/127)}
- H10D 62/8325: {Silicon carbide}
- H10D 64/2527: {for vertical devices wherein the source or drain electrodes are recessed in semiconductor bodies}
- H10D 64/256: {for lateral devices wherein the source or drain electrodes are recessed in semiconductor bodies (source or drain electrodes of TFTs H10D30/673)}
- H10D 64/62: Electrodes ohmically coupled to a semiconductor
- H10D 64/64: Electrodes comprising a Schottky barrier to a semiconductor
- H10D 64/661: {the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation (having lateral variation in the gate structure H10D64/671)}
- H10D 84/144: {in antiparallel diode configurations}
- H10D 84/146: {the built-in components being Schottky barrier diodes}
- H10D 30/0295: {using recessing of the source electrodes}
- H10D 30/0297: {using recessing of the gate electrodes, e.g. to form trench gate electrodes}
- H10P 30/2042: {into crystalline silicon carbide}
- H10P 30/21: {of electrically active species}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

The semiconductor device includes: a semiconductor layer in which a trench is formed having a side surface and a bottom surface; a second conductivity-type layer formed on the semiconductor layer on the side surface and the bottom surface of the trench; a first conductivity-type layer formed on the semiconductor layer so as to contact the second conductivity-type layer; a first electrode electrically connected to the first conductivity-type layer; a second electrode embedded in the trench and electrically connected to the second conductivity-type layer; and a barrier-forming layer which is arranged between the second electrode and the side surface of the trench and which, between said barrier-forming layer and the second conductivity-type layer, forms a potential barrier higher than the potential barrier between the second conductivity-type layer and the second electrode.

## Claims

### Claim 1

A semiconductor device comprising:
a semiconductor layer in which a trench having a side surface and a bottom surface is formed;
a second conductivity type layer formed in the semiconductor layer on the side surface and the bottom surface of the trench;
a first conductivity type layer formed in the semiconductor layer so as to be contiguous to the second conductivity type layer;
a first electrode electrically connected to the first conductivity type layer;
a second electrode that is embedded in the trench and that is electrically connected to the second conductivity type layer; and
a barrier-forming layer that is disposed between the side surface of the trench and the second electrode and that forms a potential barrier between the barrier-forming layer and the second conductivity type layer higher than a potential barrier between the second conductivity type layer and the second electrode.

### Claim 2 (depends on 1)

The semiconductor device according to claim 1, wherein the barrier-forming layer is further disposed on an edge portion of the bottom surface of the trench.

### Claim 3 (depends on 1)

The semiconductor device according to claim 1, wherein the barrier-forming layer includes a metal layer made of any one of tungsten (W), platinum (Pt), nickel (Ni), cobalt (Co), and molybdenum (Mo).

### Claim 4 (depends on 1)

The semiconductor device according to claim 1, wherein the barrier-forming layer includes a first conductivity type polysilicon layer.

### Claim 5 (depends on 1)

The semiconductor device according to claim 1, wherein the barrier-forming layer includes an insulating layer made of any one of non-doped polysilicon, silicon oxide (SiO2), aluminum oxide (Al2O3), and aluminum oxynitride (AlON).

### Claim 6

A semiconductor device comprising:
a semiconductor layer in which a taper trench having a side surface and a bottom surface is formed, the side surface being inclined with respect to the bottom surface at an obtuse angle;
a second conductivity type layer formed in the semiconductor layer on the side surface and the bottom surface of the taper trench, the second conductivity type layer becoming thicker in a lateral direction along a surface of the semiconductor layer from the side surface corresponding to an inclination of the side surface of the taper trench;
a first conductivity type layer formed in the semiconductor layer so as to be contiguous to the second conductivity type layer;
a first electrode electrically connected to the first conductivity type layer; and
a second electrode that is embedded in the taper trench and that is electrically connected to the second conductivity type layer.

### Claim 7 (depends on 6)

The semiconductor device according to claim 6, further comprising a barrier-forming layer that is disposed between the side surface of the taper trench and the second electrode and that forms a potential barrier between the barrier-forming layer and the second conductivity type layer higher than a potential barrier between the second conductivity type layer and the second electrode.

### Claim 8 (depends on 7)

The semiconductor device according to claim 7, wherein the barrier-forming layer is further disposed on an edge portion of the bottom surface of the taper trench.

### Claim 9 (depends on 7)

The semiconductor device according to claim 7, wherein the barrier-forming layer includes a metal layer made of any one of tungsten (W), platinum (Pt), nickel (Ni), cobalt (Co), and molybdenum (Mo).

### Claim 10 (depends on 7)

The semiconductor device according to claim 7, wherein the barrier-forming layer includes a first conductivity type polysilicon layer.

### Claim 11 (depends on 7)

The semiconductor device according to claim 7, wherein the barrier-forming layer includes an insulating layer made of any one of non-doped polysilicon, silicon oxide (SiO2), aluminum oxide (Al2O3), and aluminum oxynitride (AlON).

### Claim at position 12

12-27. (canceled)
