# US 2016/0259674 A1 · Method of operating semiconductor memory device and memory system including semiconductor memory device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2016/0259674 A1 - Document ID: US20160259674A1 - Status: Published application - Kind: A1 - Application number: 14/815,143 - Filed: 2015-07-31 - Published: 2016-09-08 - Earliest claimed: 2015-03-04 - Assignees: SK hynix Inc. - Applicants: SK hynix Inc. - Inventors: Ju Hyeon HAN - Web page: https://patentgrep.com/patent/US20160259674A1 ## CPC - G06F 11/076: {by exceeding a count or rate limit, e.g. word- or bit count limit} - G06F 11/073: {in a memory management context, e.g. virtual memory or cache management (memory management G06F12/00; testing of static memory units G11C29/00)} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract Disclosed is a method of operating a semiconductor memory device including a plurality of pages, including: receiving a program command, an address, and program data; reading page data from a selected page corresponding to the address in response to the program command; determining whether the number of bits of data corresponding to a program state among the page data is greater than a threshold value; and outputting a state fail signal without performing a program operation on the selected page based on a result of the determination. ## Claims ### Claim 1 A method of operating a semiconductor memory device including a plurality of pages, the method comprising: receiving a program command, an address, and program data; reading page data from a selected page corresponding to the address in response to the program command; determining whether the number of bits of data corresponding to a program state among the page data is greater than a threshold value; and outputting a state fail signal without performing a program operation on the selected page based on a result of the determination. ### Claim 2 (depends on 1) The method of claim 1, wherein the state fail signal is output when the number of bits of the data corresponding to the program state among the page data is greater than the threshold value. ### Claim 3 (depends on 1) The method of claim 1, further comprising: programming the program data on the selected page when the number of bits of the data corresponding to the program state among the page data is less than or equal to the threshold value. ### Claim 4 (depends on 1) The method of claim 1, wherein the selected page includes a plurality of memory cells, each of which is defined as a multi-level cell storing a plurality of data bits. ### Claim 5 (depends on 4) The method of claim 4, wherein the address corresponds to a Least Significant Bit (LSB) page of the selected page, and the reading of the page data includes reading data stored in the LSB page of the selected page as the page data. ### Claim 6 (depends on 5) The method of claim 5, wherein the state fail signal is output when the number of bits of the data corresponding to the program state among the page data is greater than the threshold value, and the method further includes programming the program data on the LSB page of the selected page when the number of bits of the data corresponding to the program state among the page data is less than or equal to the threshold value. ### Claim 7 A method of operating a semiconductor memory device including a plurality of pages, and flag cells corresponding to the plurality of pages, respectively, the method comprising: receiving a program command, an address, and data; when the address corresponds to a Least Significant Bit (LSB) page of a selected page, reading page data from the LSB page of the selected page; reading flag data from a flag cell corresponding to the selected page; determining whether the number of bits of data corresponding to a program state among the page data is greater than a threshold value when the flag data does not correspond to a predetermined value; and outputting a state fail signal without performing a program operation on the selected page based on a result of the determination. ### Claim 8 (depends on 7) The method of claim 7, wherein, when the flag data corresponds to the predetermined value, and the state fail signal is output without programming the selected page. ### Claim 9 (depends on 7) The method of claim 7, wherein the state fail signal is output when the number of bits of the data corresponding to the program state among the page data is greater than the threshold value. ### Claim 10 (depends on 7) The method of claim 7, further comprising: programming the program data on the LSB page of the selected page when the number of bits of the data corresponding to the program state among the page data is less than or equal to the threshold value. ### Claim 11 A memory system comprising: a semiconductor memory device including a plurality of memory blocks, each of which includes a plurality of pages; and a controller suitable for transmitting a special program command to the semiconductor memory device when a program operation is performed on a page within a first memory block, and transmitting a normal program command to the semiconductor memory device when a program operation is performed on a page within a second memory block, wherein the semiconductor memory device reads page data from a selected page in response to the special program command, determines whether the number of bits of data corresponding to a program state among the page data is greater than a threshold value, and outputs a state fail signal without programming the selected page based on a result of the determination. ### Claim 12 (depends on 11) The memory system of claim 11, wherein a memory block including a programmed page among the plurality of memory blocks is defined as the first memory block, and an empty memory block among the plurality of memory blocks is defined as the second memory block. ### Claim 13 (depends on 12) The memory system of claim 12, wherein the controller stores a map table including a mapping relation between a logic block address and a physical block address, and the first memory block and the second memory block are defined based on the map table. ### Claim 14 (depends on 11) The memory system of claim 11, wherein each of the plurality of pages includes a plurality of memory cells, each of which is defined as a multi-level cell storing a plurality of data bits. ### Claim 15 (depends on 14) The memory system of claim 14, wherein the controller transmits an address to the semiconductor memory device together with the special program command, the address corresponds to a Least Significant Bit (LSB) page of the selected page, and the semiconductor memory device reads data stored in the LSB page of the selected page as the page data. ### Claim 16 (depends on 11) The memory system of claim 11, wherein the state fall signal is output when the number of bits of the data corresponding to the program state among the page data is greater than the threshold value. ### Claim 17 (depends on 11) The memory system of claim 11, wherein, when the number of bits of the data corresponding to the program state among the page data is less than or equal to the threshold value, the semiconductor memory device programs program data from the controller in the selected page. ### Claim 18 (depends on 11) The memory system of claim 11, wherein the semiconductor memory device programs program data from the controller in a second selected page in response to the normal program command.