Serial data signal edge detection
AssigneeLenovo Enterprise Solutions (Singapore) Pte. Ltd.
InventorJian Meng
Life of this patent
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Abstract
A clamping circuit clamps a serial data signal between a first high voltage level and a first low voltage level to yield a clamped serial data signal. A first comparator circuit compares the clamped serial data signal to a second high voltage level less than the first high voltage level to yield a high output equal to one just when a voltage of the clamped serial data signal is greater than the second high voltage level. A second comparator circuit compares the clamped serial data signal to second low voltage level greater than the first low voltage level to yield a low output equal to one just when the voltage of the clamped serial data signal is greater than the second low voltage level. An edge circuit detects an edge of the serial data signal from the high output and the low output.
Claims20
A method comprising:
- clamping, by a clamping circuit, a serial data signal between a first high voltage level and a first low voltage level, to yield a clamped serial data signal;
- comparing, by a first comparator circuit, the clamped serial data signal to a second high voltage level less than the first high voltage level, to yield a high output equal to one just when a voltage of the clamped serial data signal is greater than the second high voltage level;
- comparing, by a second comparator circuit, the clamped serial data signal to second low voltage level greater than the first low voltage level, to yield a low output equal to one just when the voltage of the clamped serial data signal is greater than the second low voltage level;
- and
- detecting, by an edge circuit, an edge of the serial data signal from the high output and the low output,
- wherein clamping the serial data signal comprises:
- when a voltage of the serial data signal is greater than the first high voltage level, setting the voltage of the clamped serial data signal to the first high voltage level;
- and
- when the voltage of the serial data signal is less than the first low voltage level, setting the voltage of the clamped serial data signal to the first low voltage level.
(canceled)
A circuit comprising:
- a clamping circuit to generate a clamped serial data signal by clamping a serial data signal between a first clamped voltage level and a second clamped voltage level;
- a high comparator circuit to generate a high output of one just when a voltage of the clamped serial data signal is greater than a first comparison voltage level less than the first clamped voltage level;
- a low comparator circuit to generate a low output of one just when the voltage of the clamped serial data signal is greater than a second comparison voltage level greater than the second clamped voltage level;
- and
- an edge circuit to detect an edge of the serial data signal from the high output and the low output,
- wherein the edge circuit is to:
- when an output of a first logical test changes from zero to one, detect the edge as a rising edge of the serial data signal;
- and
- when an output of a second logical test changes from zero to one, detect the edge as a falling edge of the data signal.
(canceled)
The circuit of claim Error! Reference source not found., wherein the edge circuit comprises:
- an AND circuit to perform a logical AND operation of the high output and the low output to yield the output of the first logical test;
- and
- an inverse OR (NOR) circuit to perform a logical NOR operation of the high output and the low output to yield the output of the second logical test.
The circuit of claim Error! Reference source not found., wherein the edge circuit is to:
- track a length of time that elapsed between an immediately prior edge of the serial data signal and the edge;
- and
- divide the length of time by an interval time length to determine a number of unit intervals (UIs) that elapsed between the immediately prior edge and the edge.
A circuit comprising:
- means for generating a clamped serial data signal by clamping a serial data signal between a first clamped voltage level and a second clamped voltage level;
- means for generating a high output of one just when a voltage of the clamped serial data signal is greater than a first comparison voltage level less than the first clamped voltage level;
- means for generating a low output of one just when the voltage of the clamped serial data signal is greater than a second comparison voltage level greater than the second clamped voltage level;
- and
- means for detecting an edge of the serial data signal from the high output and the low output,
- wherein the means for detecting the edge of the serial data signal is further for:
- when an output of a first logical test changes from zero to one, detecting the edge as a rising edge of the serial data signal;
- and
- when an output of a second logical test changes from zero to one, detecting the edge as a falling edge of the data signal.
(canceled)
Dependencies are inferred from the claim text.