Multi-level switching regulator circuits and methods with finite state machine control
AssigneeQUALCOMM Incorporated
InventorJongrit Lerdworatawee
Life of this patent
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Abstract
The present disclosure includes multi-level switching regulator circuits and methods with finite state machine control. In one embodiment, a circuit comprises a switching regulator and a finite state machine. The switching regulator comprises high side and low side switches, and at least one capacitor. A finite state machine receiving a switching signal and a duty cycle signal to generate switch control signals to the switches. The switches are turned on and off under control of the finite state machine in response to transitions of the switching signal and the duty cycle signal. The switching signal may be generated from an envelope tracking signal, and the switching regulator may be part of an envelope tracking system.
Claims20
A circuit comprising:
- a switching regulator comprising a plurality of high side switches, a plurality of low side switches, and at least one capacitor having a first terminal coupled to a first node between the high side switches and a second terminal coupled to a second node between the low side switches, wherein the high side switches and the low side switches receive switch control signals;
- and
- a finite state machine receiving a switching signal and a duty cycle signal to generate the switch control signals, the finite state machine controlling the high side switches and the low side switches based on the switching signal and the duty cycle signal,
- wherein the high side switches and the low side switches are turned on and off under control of the finite state machine in response to transitions of the switching signal and the duty cycle signal.
A method comprising:
- comparing a sensed output voltage of a switching regulator to a voltage reference to produce a first signal;
- sensing a current from a control amplifier of the switching regulator in response to a control signal to produce a second signal;
- receiving the first signal and the second signal in a finite state machine to control a state of switches in an output stage of the switching regulator,
- wherein the output stage comprises a plurality of switches configured in series between a supply voltage and a reference voltage and at least one capacitor having a first terminal configured between a first switch and a second switch and a second terminal configured between a third switch and a fourth switch, and
- wherein the plurality of switches are turned on and off in response to changes in the first signal and the second signal.
A circuit comprising:
- a switching regulator comprising:
- a first switch having a first terminal coupled to a power supply voltage;
- a second switch configured between the first switch and a switching node;
- a third switch coupled to the switching node;
- a fourth switch configured between the third switch and a reference voltage;
- an inductor having a first terminal coupled to the switching node and a second terminal;
- and
- a capacitor having a first terminal configured between the first switch and the second switch and a second terminal configured between the third switch and the fourth switch;
- an amplifier, the amplifier having an input to receive a time varying voltage control signal and an output to produce an output voltage, wherein the output of the amplifier is coupled to the second terminal of the inductor;
- and
- a current sense hysteretic controller to sense an output current from the amplifier, and in accordance therewith, generate a switching signal to the switching regulator.
Dependencies are inferred from the claim text.