# US 2016/0254641 A1 · Optical interconnect on bumpless build-up layer package

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- Number: US 2016/0254641 A1
- Document ID: US20160254641A1
- Status: Published application
- Kind: A1
- Application number: 15/056,794
- Filed: 2016-02-29
- Published: 2016-09-01
- Earliest claimed: 2012-12-17
- Assignees: Intel Corporation
- Applicants: Intel Corporation
- Inventors: Feras Eid; Johanna Swan; Weng Hong Teh
- Web page: https://patentgrep.com/patent/US20160254641A1

## CPC

- H01S 5/0237: by soldering
- H01S 5/02251: using optical fibres
- H01S 5/02253: using lenses
- H01S 5/02345: Wire-bonding
- H01S 5/18305: {with emission through the substrate, i.e. bottom emission}
- H10W 70/09: extending onto an encapsulation that laterally surrounds the chip or wafer, e.g. fan-out wafer level package [FOWLP] RDLs
- H10W 70/60: Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40)
- H01S 5/02255: using beam deflecting elements
- H01S 5/02325: Mechanically integrated components on mount members or optical micro-benches
- H01S 5/183: having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]
- H10W 72/9413: {on encapsulations}
- H10W 74/019: {using temporary auxiliary substrates (H10W74/017 takes precedence)}
- H10W 90/00: Package configurations
- H10W 90/722: {between stacked chips}
- H01S: DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

This disclosure relates generally to an electronic package that can include a die and a dielectric layer at least partially enveloping the die. Electrical interconnects can be electrically coupled to the die and passing, at least in part, through the dielectric layer. An optical emitter can be electrically coupled to the die with a first one of the electrical interconnects and configured to emit light from a first major surface of the electronic package. A solder bump can be electrically coupled to the die with a second one of the electrical interconnects and positioned on a second major surface of the electronic package different from the first major surface.

## Claims

### Claim 1

A method of making a package, comprising:
electrically coupling electrical interconnects to a die;
forming a dielectric layer that at least partially envelops the die and the electrical interconnects;
electrically coupling an optical emitter to a first one of the electrical interconnects, wherein the optical emitter is electrically coupled to the die, and wherein the optical emitter is configured to emit light from a first major surface of the package; and
forming a solder bump coupled to a second one of the electrical interconnects and electrically coupled to the die, wherein the solder bump is positioned on a second major surface of the package.