# US 2016/0253264 A1 · Intelligent bandwidth shifting mechanism > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2016/0253264 A1 - Document ID: US20160253264A1 - Status: Published application - Kind: A1 - Application number: 14/595,737 - Filed: 2015-01-13 - Published: 2016-09-01 - Earliest claimed: 2015-01-13 - Assignees: International Business Machines Corporation - Applicants: International Business Machines Corporation - Inventors: Pradip Bose; Alper Buyuktosunoglu; Victor Javier Jimenez Perez; Francis P. O'Connell - Web page: https://patentgrep.com/patent/US20160253264A1 ## CPC - G06F 12/0862: with prefetch - G06F 9/46: Multiprogramming arrangements - G06F 9/5011: {the resources being hardware resources other than CPUs, Servers and Terminals} - G06F 11/30: Monitoring - G06F 11/3024: {where the computing system component is a central processing unit [CPU]} - G06F 11/348: {Circuit details, i.e. tracer hardware} - G06F 11/3433: {for load management (allocation of a server based on load conditions G06F9/505; load rebalancing G06F9/5083; redistributing the load in a network by a load balancer H04L67/1029)} - G06F 2201/88: Monitoring involving counting - G06F 2209/507: Low-level - G06F 2209/508: Monitor - G06F 2212/1024: Latency reduction - G06F 2212/602: Details relating to cache prefetching - G06F 2212/6026: Prefetching based on access pattern detection, e.g. stride based prefetch - G06F 2212/6028: Prefetching based on hints or prefetch instructions - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract In an approach for sharing memory bandwidth in one or more processors, a processor receives a first set of monitored usage information for one or more processors executing one or more threads. A processor calculates impact of hardware data prefetching for each thread of the one or more threads, based on the first set of monitored usage information. A processor adjusts prefetch settings for the one or more threads, based on the calculated impact of hardware data prefetching for each thread of the one or more threads. ## Claims ### Claim 1 A method for sharing memory bandwidth in one or more processors, the method comprising: receiving a first set of monitored usage information for one or more processors executing one or more threads; calculating impact of hardware data prefetching for each thread of the one or more threads, based on the first set of monitored usage information; and adjusting prefetch settings for the one or more threads, based on calculated impact of hardware data prefetching for each thread of the one or more threads. ### Claim 2 (depends on 1) The method of claim 1, wherein the first set of monitored usage information comprises at least, for each thread of the one or more threads, instructions completed per cycle when prefetch is enabled, instructions completed per cycle when prefetch is disabled, memory bandwidth consumption when prefetch is enabled, and memory bandwidth consumption when prefetch is disabled; and wherein the step of calculating the impact of hardware data prefetching for each thread of the one or more threads is based on at least instructions completed per cycle when prefetch is enabled, instructions completed per cycle when prefetch is disabled, memory bandwidth consumption when prefetch is enabled, and memory bandwidth consumption when prefetch is disabled. ### Claim 3 (depends on 1) The method of claim 1, wherein the first set of monitored usage information comprises at least, for each thread of the one or more threads, prefetch requests generated and prefetched data utilized; and wherein the step of calculating the impact of hardware data prefetching for each thread of the one or more threads is based on at least prefetch requests generated and prefetched data utilized. ### Claim 4 (depends on 1) The method of claim 1, further comprising: prior to receiving the first set of monitored usage information, adjusting the prefetch settings for the one or more threads to maximize prefetching for each thread of the one or more threads. ### Claim 5 (depends on 1) The method of claim 1, further comprising: receiving a second set of monitored usage information for the one or more processors executing the one or more threads, subsequent to adjusting the prefetch settings for the one or more threads; determining that adjusted prefetch settings have a negative effect on the one or more processors executing the one or more threads, based on the second set of monitored usage information; and adjusting the prefetch settings for the one or more threads to a previous setting. ### Claim 6 (depends on 1) The method of claim 1, further comprising: determining that memory bandwidth is saturated for the one or more processors executing the one or more threads, based on the first set of monitored usage information. ### Claim 7 (depends on 1) The method of claim 1, further comprising: receiving a second set of monitored usage information for the one or more processors executing the one or more threads, subsequent to adjusting the prefetch settings for the one or more threads; and determining that the adjusted prefetch settings do not have a negative effect on the one or more processors executing the one or more threads, based on the second set of monitored usage information. ### Claim 8 A computer program product for sharing memory bandwidth in one or more processors, the computer program product comprising: one or more computer readable storage media and program instructions stored on the one or more computer readable storage media, the program instructions comprising: program instructions to receive a first set of monitored usage information for one or more processors executing one or more threads; program instructions to calculate impact of hardware data prefetching for each thread of the one or more threads, based on the first set of monitored usage information; and program instructions to adjust prefetch settings for the one or more threads, based on calculated impact of hardware data prefetching for each thread of the one or more threads. ### Claim 9 (depends on 8) The computer program product of claim 8, wherein the first set of monitored usage information comprises at least, for each thread of the one or more threads, instructions completed per cycle when prefetch is enabled, instructions completed per cycle when prefetch is disabled, memory bandwidth consumption when prefetch is enabled, and memory bandwidth consumption when prefetch is disabled; and wherein program instructions to calculate the impact of hardware data prefetching for each thread of the one or more threads are based on at least instructions completed per cycle when prefetch is enabled, instructions completed per cycle when prefetch is disabled, memory bandwidth consumption when prefetch is enabled, and memory bandwidth consumption when prefetch is disabled. ### Claim 10 (depends on 8) The computer program product of claim 8, wherein the first set of monitored usage information comprises at least, for each thread of the one or more threads, prefetch requests generated and prefetched data utilized; and wherein program instructions to calculate the impact of hardware data prefetching for each thread of the one or more threads are based on at least prefetch requests generated and prefetched data utilized. ### Claim 11 (depends on 8) The computer program product of claim 8, further comprising: program instructions, stored on the one or more computer readable storage media, to, prior to receiving the first set of monitored usage information, adjust the prefetch settings for the one or more threads to maximize prefetching for each thread of the one or more threads. ### Claim 12 (depends on 8) The computer program product of claim 8, further comprising: program instructions, stored on the one or more computer readable storage media, to receive a second set of monitored usage information for the one or more processors executing the one or more threads, subsequent to adjusting the prefetch settings for the one or more threads; program instructions, stored on the one or more computer readable storage media, to determine that the adjusted prefetch settings have a negative effect on the one or more processors executing the one or more threads, based on the second set of monitored usage information; and program instructions, stored on the one or more computer readable storage media, to adjust the prefetch settings for the one or more threads to a previous setting. ### Claim 13 (depends on 8) The computer program product of claim 8, further comprising: program instructions, stored on the one or more computer readable storage media, to determine that memory bandwidth is saturated for the one or more processors executing the one or more threads, based on the first set of monitored usage information. ### Claim 14 (depends on 8) The computer program product of claim 8, further comprising: program instructions, stored on the one or more computer readable storage media, to receive a second set of monitored usage information for the one or more processors executing the one or more threads, subsequent to adjusting the prefetch settings for the one or more threads; and program instructions, stored on the one or more computer readable storage media, to determine that the adjusted prefetch settings do not have a negative effect on the one or more processors executing the one or more threads, based on the second set of monitored usage information. ### Claim 15 A computer system for sharing memory bandwidth in one or more processors, the computer system comprising: one or more computer processors, one or more computer readable storage media, and program instructions stored on the computer readable storage media for execution by at least one of the one or more processors, the program instructions comprising: program instructions to receive a first set of monitored usage information for one or more processors executing one or more threads; program instructions to calculate impact of hardware data prefetching for each thread of the one or more threads, based on the first set of monitored usage information; and program instructions to adjust prefetch settings for the one or more threads, based on the calculated impact of hardware data prefetching for each thread of the one or more threads. ### Claim 16 (depends on 15) The computer system of claim 15, wherein the first set of monitored usage information comprises at least, for each thread of the one or more threads, instructions completed per cycle when prefetch is enabled, instructions completed per cycle when prefetch is disabled, memory bandwidth consumption when prefetch is enabled, and memory bandwidth consumption when prefetch is disabled; and wherein program instructions to calculate the impact of hardware data prefetching for each thread of the one or more threads are based on at least instructions completed per cycle when prefetch is enabled, instructions completed per cycle when prefetch is disabled, memory bandwidth consumption when prefetch is enabled, and memory bandwidth consumption when prefetch is disabled. ### Claim 17 (depends on 15) The computer system of claim 15, wherein the first set of monitored usage information comprises at least, for each thread of the one or more threads, prefetch requests generated and prefetched data utilized; and wherein program instructions to calculate the impact of hardware data prefetching for each thread of the one or more threads are based on at least prefetch requests generated and prefetched data utilized. ### Claim 18 (depends on 15) The computer system of claim 15, further comprising: program instructions, stored on the computer readable storage media for execution by at least one of the one or more processors, to, prior to receiving the first set of monitored usage information, adjust the prefetch settings for the one or more threads to maximize prefetching for each thread of the one or more threads. ### Claim 19 (depends on 15) The computer system of claim 15, further comprising: program instructions, stored on the computer readable storage media for execution by at least one of the one or more processors, to receive a second set of monitored usage information for the one or more processors executing the one or more threads, subsequent to adjusting the prefetch settings for the one or more threads; program instructions, stored on the computer readable storage media for execution by at least one of the one or more processors, to determine that the adjusted prefetch settings have a negative effect on the one or more processors executing the one or more threads, based on the second set of monitored usage information; and program instructions, stored on the computer readable storage media for execution by at least one of the one or more processors, to adjust the prefetch settings for the one or more threads to a previous setting. ### Claim 20 (depends on 15) The computer system of claim 15, further comprising: program instructions, stored on the computer readable storage media for execution by at least one of the one or more processors, to determine that memory bandwidth is saturated for the one or more processors executing the one or more threads, based on the first set of monitored usage information.