# US 2016/0252573 A1 · Test-per-clock based on dynamically-partitioned reconfigurable scan chains

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- Number: US 2016/0252573 A1
- Document ID: US20160252573A1
- Status: Published application
- Kind: A1
- Application number: 15/150,147
- Filed: 2016-05-09
- Published: 2016-09-01
- Earliest claimed: 2013-06-17
- Assignees: Mentor Graphics Corporation
- Applicants: Mentor Graphics Corporation
- Inventors: Janusz Rajski; Jedrzej Solecki; Jerzy Tyszer; Grzegorz Mrugalski
- Web page: https://patentgrep.com/patent/US20160252573A1

## CPC

- G01R 31/318555: {Control logic}
- G01R 31/31704: {Design for test; Design verification (concerning scan tests G01R31/318583; computer-aided design G06F30/00)}
- G01R 31/3177: Testing of logic operation, e.g. by logic analysers
- G01R 31/318544: {Scanning methods, algorithms and patterns (G01R31/3183 takes precedence)}
- G01R 31/318547: {Data generators or compressors}
- G01R 31/318575: {Power distribution; Power saving}
- G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12)

## Abstract

Aspects of the invention relate to a test-per-clock scheme based on dynamically-partitioned reconfigurable scan chains. Every clock cycle, scan chains configured by a control signal to operate in a shifting-launching mode shift in test stimuli one bit and immediately applies the newly formed test pattern to the circuit-under-test; and scan chains configured by the control signal to operate in a capturing-compacting-shifting mode shift out one bit of previously compacted test response data while compacting remaining bits of the previously compacted test response data with a currently-captured test response to form currently compacted test response data. A large number of scan chains may be configured by the control signal to work in a mission mode. After a predetermined number of clock cycles, a different control signal may be applied to reconfigure and partition the scan chains for applying different test stimuli.

## Claims

### Claim at position 1

-16. (canceled)

### Claim 17

A method, comprising:
shifting test stimuli into a first portion of a plurality of scan chains in a circuit one bit per scan chain to form a new test pattern;
applying the new test pattern to the circuit;
shifting out previously compacted test response data stored in a second portion of the plurality of scan chains one bit per scan chain;
compacting a test response corresponding to the new test pattern with the previously compacted test response data to generate newly compacted test response data in the second portion of the plurality of scan chains; and
repeating the above operations for a predetermined number of times.

### Claim 18 (depends on 17)

The method recited in claim 17, further comprising:
applying a control signal to configure some scan chains in the plurality of scan chains to operate in a shifting-launching mode as the first portion of the plurality of scan chains, some other scan chains in the plurality of scan chains to operate in a capturing-compacting-shifting mode as the second portion of the plurality of scan chains, rest of the plurality of scan chains to operate in a mission mode as the third portion of the plurality of can chains.

### Claim 19 (depends on 17)

The method recited in claim 17, wherein the control signal is stored in a register in the circuit.

### Claim 20 (depends on 17)

The method recited in claim 17, wherein parallel outputs of the second portion of the plurality of scan chains are blocked from driving the circuit.