# US 2016/0252572 A1 · Semiconductor integrated circuit device including variable frequency type probe test pad and semiconductor system

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- Number: US 2016/0252572 A1
- Document ID: US20160252572A1
- Status: Published application
- Kind: A1
- Application number: 14/724,430
- Filed: 2015-05-28
- Published: 2016-09-01
- Earliest claimed: 2015-02-27
- Assignees: SK hynix Inc.
- Applicants: SK hynix Inc.
- Inventors: Seung Geun BAEK
- Web page: https://patentgrep.com/patent/US20160252572A1

## CPC

- G01R 31/315: by inductive methods
- G01R 31/2884: {using dedicated test connectors, test elements or test circuits on the IC under test (G01R31/2855 takes precedence)}
- G01R 31/3025: {Wireless interface with the DUT}
- G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12)

## Abstract

A semiconductor integrated circuit device including a variable frequency type probe test pad and a semiconductor system are disclosed. The semiconductor integrated circuit device includes a plurality of probe test pads formed on a semiconductor substrate and configured to induce non-contact electrical coupling with a probe card, and a frequency control unit electrically coupled to each of the plurality of probe test pads, and configured to vary a frequency of each of the plurality of probe test pads.

## Claims

### Claim 1

A semiconductor integrated circuit device comprising:
a plurality of probe test pads formed on a semiconductor substrate and configured to induce non-contact electrical coupling with a probe card; and
a frequency control unit electrically coupled to each of the plurality of probe test pads, and configured to vary a frequency of each of the plurality of probe test pads.

### Claim 2 (depends on 1)

The semiconductor integrated circuit device of claim 1, wherein the plurality of probe test pads are formed in an inductance generation structure to perform an antenna operation.

### Claim 3 (depends on 1)

The semiconductor integrated circuit device of claim 1, wherein the plurality of probe test pads are provided in a same shape.

### Claim 4 (depends on 1)

The semiconductor integrated circuit device of claim 1, wherein the plurality of probe test pads are provided in different shapes from each other.

### Claim 5 (depends on 1)

The semiconductor integrated circuit device of claim 1, wherein the frequency control unit includes a plurality of capacitors electrically coupled to each of the plurality of probe test pads and electrically coupled substantially in parallel to each other, and a plurality of switches configured to selectively electrically couple the plurality of capacitors electrically coupled in parallel.

### Claim 6 (depends on 5)

The semiconductor integrated circuit device of claim 5, further comprising a device layer between the semiconductor substrate and the probe test pads,
wherein the frequency control unit includes a plurality of conductive layers formed in the device layer, and insulating layers interposed between the conductive layers.

### Claim 7 (depends on 1)

The semiconductor integrated circuit device of claim 1, wherein the frequency control unit is a voltage controlled oscillator (VCO).

### Claim 8

A semiconductor system comprising:
a semiconductor device including a plurality of probe test pads disposed to face a probe electrode of a probe card, and configured to have an antenna structure and induce non-contact electrical coupling with the probe electrode and a frequency control unit electrically coupled to the plurality of probe test pads and configured to vary frequencies of the plurality of probe test pads; and
a controller configured to perform interfacing with the semiconductor device and transfer a test command to the plurality of probe test pads.

### Claim 9 (depends on 8)

The semiconductor system of claim 8, wherein the plurality of probe test pads are provided in a same shape.

### Claim 10 (depends on 8)

The semiconductor system of claim 8, wherein the plurality of probe test pads are provided in different shapes from each other.

### Claim 11 (depends on 8)

The semiconductor system of claim 8, wherein the frequency control unit includes a plurality of capacitors electrically coupled to the plurality of probe test pads and electrically coupled substantially in parallel to each other, and a plurality of switches configured to selectively electrically couple the plurality of capacitors electrically coupled in parallel.

### Claim 12 (depends on 11)

The semiconductor system of claim 11, further comprising a device layer between the semiconductor substrate and the probe test pads,
wherein the frequency control unit includes a plurality of conductive layers formed in the device layer, and insulating layers interposed between the conductive layers.

### Claim 13 (depends on 8)

The semiconductor system of claim 8, wherein the frequency control unit is a voltage controlled oscillator (VCO).

### Claim 14

A semiconductor probe testing method comprising:
providing a plurality of probe test pads adjacent to each other;
performing a non-contact probe test on a first probe test pad among the plurality of probe test pads in a first frequency; and
performing an other non-contact probe test on a second probe test pad adjacent to the first probe test pad in a second frequency different from the first frequency.

### Claim 15 (depends on 14)

The semiconductor probe testing method of claim 14, further comprising:
electrically coupling a voltage controlled oscillator to one of the plurality of probe test pads.

### Claim 16 (depends on 15)

The semiconductor probe testing method of claim 15, wherein the one of the plurality of probe test pads is configured in an antenna structure.

### Claim 17 (depends on 14)

The semiconductor probe testing method of claim 14, wherein the plurality of probe test pads each provide different frequencies from each other.

### Claim 18 (depends on 14)

The semiconductor probe testing method of claim 14, wherein the plurality of probe test pads each provide a same inductance.
