Thin film transistor array substrate and manufacturing method of the same

A method of manufacturing a thin film transistor array substrate, the method comprising:

• forming a first conductive pattern group including a gate line extending along a first direction, data lines extending along a second direction crossing the first direction and spaced apart from each other along the second direction with the gate line therebetween, and a gate electrode protruding from the gate line;
• forming a gate insulating layer covering the first conductive pattern group;
• forming a stack structure, including an active pattern and a preliminary metal pattern disposed on the active pattern, on the gate insulating layer to overlap the gate electrode;
• forming a first protective layer in which an active hole exposing the stack structure and bridge contact holes extending to the gate insulating layer and exposing the data lines are defined;
• forming a second conductive pattern group including a bridge pattern filling the bridge contact holes and coupling the data lines, a source electrode extending from the bridge pattern to an upper portion of the stack structure, and a drain electrode spaced apart from the source electrode, facing the source electrode and disposed on the stack structure;
• and
• forming metal patterns exposing the active pattern by etching the preliminary metal pattern exposed by the second conductive pattern group.