US 2016/0240684 A1Published application

Semiconductor device and method for manufacturing the same

AssigneeSemiconductor Energy Laboratory Co., Ltd.

InventorsShunpei YAMAZAKI, Yoshinobu ASAMI, Yutaka OKAZAKI, Motomu KURATA, Katsuaki TOCHIBAYASHI, Shinya SASAGAWA, Kensuke YOSHIZUMI, Hideomi SUZAWA

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Abstract

A miniaturized transistor, a transistor with low parasitic capacitance, a transistor with high frequency characteristics, or a semiconductor device including the transistor is provided. The semiconductor device includes a first insulator, an oxide semiconductor over the first insulator, a first conductor and a second conductor that are in contact with the oxide semiconductor, a second insulator that is over the first and second conductors and has an opening reaching the oxide semiconductor, a third insulator over the oxide semiconductor and the second insulator, and a fourth conductor over the third insulator. The first conductor includes a first region and a second region. The second conductor includes a third region and a fourth region. The second region faces the third region with the first conductor and the first insulator interposed therebetween. The second region is thinner than the first region. The third region is thinner than the fourth region.

Claims19

Dependent claims

A semiconductor device comprising:

an oxide semiconductor;
a first conductor;
a second conductor;
a third conductor;
a first insulator;
and
a second insulator,
wherein the first conductor comprises:
a first region;
a second region;
and
a third region,
wherein the first region comprises a region where the first conductor overlaps with the oxide semiconductor with the first insulator interposed between the first conductor and the oxide semiconductor,
wherein the second region comprises a region where the first conductor overlaps with the second conductor with the first insulator and the second insulator interposed between the first conductor and the second conductor,
wherein the third region comprises a region where the first conductor overlaps with the third conductor with the first insulator and the second insulator interposed between the first conductor and the third conductor,
wherein the oxide semiconductor comprises:
a fourth region comprising a region where the oxide semiconductor is in contact with the second conductor;
and
a fifth region comprising a region where the oxide semiconductor is in contact with the third conductor,
wherein the second conductor comprises:
a sixth region;
and
a seventh region,
wherein the third conductor comprises:
an eighth region;
and
a ninth region,
wherein the seventh region faces the eighth region with the first conductor and the first insulator interposed between the seventh region and the eighth region, and
wherein the seventh region is thinner than the sixth region and the eighth region is thinner than the ninth region.

26 more elements

A method for manufacturing a semiconductor device, comprising the steps of:

forming a first oxide semiconductor over a first insulator;
forming a second oxide semiconductor over the first oxide semiconductor;
etching part of the first oxide semiconductor and part of the second oxide semiconductor to form an island-shaped oxide semiconductor layer comprising the first oxide semiconductor and the second oxide semiconductor;
forming, over the first insulator and the island-shaped oxide semiconductor layer, a first conductor comprising a first region, a second region, a third region, a fourth region, and a fifth region;
forming a resist over the second region, the third region, the fourth region, and the fifth region;
etching the first region of the first conductor;
reducing the resist to form a resist over the fourth region and the fifth region;
etching the first region, the second region, and the third region of the first conductor and then etching the entire first region of the first conductor to form a first conductive layer and a second conductive layer;
forming a second conductor over the first insulator, the first conductive layer, and the second conductive layer;
forming a second photoresist over the second conductor;
etching the second conductor to form a third conductive layer;
forming a second insulator over the first insulator and the third conductive layer;
forming an opening reaching a top surface of the first insulator and an opening reaching a top surface of the island-shaped oxide semiconductor layer in the second insulator and the third conductive layer to separate the third conductive layer into a fourth conductive layer and a fifth conductive layer;
forming a third oxide semiconductor over the second insulator and the island-shaped oxide semiconductor layer;
forming a third insulator over the third oxide semiconductor;
forming a third conductor over the third insulator;
etching part of the third conductor to form a sixth conductive layer;
and
forming a fourth insulator over the second insulator and the sixth conductive layer.

16 more elements

A method for manufacturing a semiconductor device, comprising the steps of:

forming a first oxide semiconductor over a first insulator;
forming a second oxide semiconductor over the first oxide semiconductor;
etching part of the first oxide semiconductor and part of the second oxide semiconductor to form an island-shaped oxide semiconductor layer comprising the first oxide semiconductor and the second oxide semiconductor;
forming, over the first insulator and the island-shaped oxide semiconductor layer, a first conductor comprising a first region, a second region, a third region, a fourth region, and a fifth region;
forming a resist over the second region, the third region, the fourth region, and the fifth region;
etching the first region of the first conductor;
reducing the resist to form a resist over the fourth region and the fifth region;
etching the first region, the second region, and the third region of the first conductor and then etching the entire first region of the first conductor to form a first conductive layer and a second conductive layer;
forming a second conductor over the first insulator, the first conductive layer, and the second conductive layer;
forming a second photoresist over the second conductor;
etching the second conductor to form a third conductive layer;
forming a second insulator over the first insulator and the third conductive layer;
forming an opening reaching a surface of the first insulator and an opening reaching a surface of the island-shaped oxide semiconductor layer in the second insulator and the third conductive layer to separate the third conductive layer into a fourth conductive layer and a fifth conductive layer;
forming a third oxide semiconductor over the second insulator and the island-shaped oxide semiconductor layer;
forming a third insulator over the third oxide semiconductor;
forming a third conductor over the third insulator;
etching part of the third conductor to form a sixth conductive layer;
forming a fourth insulator over the second insulator and the sixth conductive layer using plasma comprising oxygen to add the oxygen in the plasma into the second insulator as excess oxygen;
performing heat treatment to move the excess oxygen to the second oxide semiconductor;
and
forming a fifth insulator over the fourth insulator.

18 more elements

Dependencies are inferred from the claim text.

Facts

Application: 15/019,004Filed 9 Feb 2016
Priority: JP 2015-02559312 Feb 2015
Published: 18 Aug 2016
Term ends: Not estimatedThe source records don’t support an estimate.

Classification17 codes

H10D 30/6755
Characterised by the active materials: oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
H10D 30/6734
Multi-gate TFTs: having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs
H10D 86/423
Having a particular composition, shape or crystalline structure of the active layer: comprising semiconductor materials not belonging to the Group…
H10D 86/60
Characterised by multiple TFTs: wherein the TFTs are in active matrices