Semiconductor structure with extending gate structure and method for forming the same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChe-Cheng CHANG, Chih-Han LIN
Life of this patent
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Abstract
A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a substrate and a fin structure formed over the substrate. The semiconductor structure further includes an isolation structure formed around the fin structure and a gate structure formed across the fin structure. In addition, the gate structure includes a first portion formed over the fin structure and a second portion formed over the isolation structure, and the second portion of the gate structure includes an extending portion extending into the isolation structure.
Claims21
A semiconductor structure, comprising:
- a substrate;
- a fin structure formed over the substrate;
- an isolation structure formed around the fin structure;
- a gate structure formed across the fin structure;
- and
- a spacer formed on a sidewall of the second portion of the gate structure, wherein:
- the gate structure comprises a first portion formed over the fin structure and a second portion formed over the isolation structure, and the second portion of the gate structure comprises an extending portion extending into the isolation structure, and
- a dielectric layer is disposed between the spacer and the isolation structure.
A semiconductor structure, comprising:
- a substrate;
- a fin structure formed over the substrate;
- an isolation structure formed around the fin structure;
- a gate structure formed across the fin structure and extending over the isolation structure;
- and
- a spacer formed on a sidewall of the gate structure, wherein:
- a portion of the spacer formed on the sidewall of the gate structure over the isolation structure has a first height, and a portion of the gate structure formed over the isolation structure has a second height which is greater than the first height, and
- a dielectric layer is disposed between the spacer and the isolation structure.
15-20. (canceled)
A semiconductor device including a fin FET device, comprising:
- a fin structure extending in a first direction and extending from an isolation insulating layer;
- a gate stack including a gate electrode layer, a gate dielectric layer, sidewall insulating layers disposed at both vertical sides of the gate electrode layer, the gate stack being disposed over the isolation insulating layer and covering a portion of the fin structure, the gate stack extending in a second direction perpendicular to the first direction;
- and
- interlayer dielectric layers disposed at both vertical sides of the sidewall insulating layers, wherein:
- a recess is formed in an upper surface of the isolation insulating layer not covered by the sidewall insulating layers and the interlayer dielectric layers,
- at least part of the gate electrode layer and the gate dielectric layer fill the recess, and
- a dielectric layer is disposed between the sidewall insulating layers and the isolation structure.
Dependencies are inferred from the claim text.