Low damage passivation layer for iii-v based devices

A method of forming a group III-V semiconductor device comprising:

• providing a substrate;
• forming a bulk buffer layer over the substrate;
• forming a heterojunction structure of III-V materials over the bulk buffer layer;
• forming an interfacial layer of III-V material over the heterojunction structure;
• forming a bulk passivation layer contacting the interfacial layer;
• forming source and drain regions over the heterojunction structure;
• and
• forming a capping layer over the source and drain regions and the bulk passivation layer;
• and
• forming a gate region, comprising a gate electrode overlying a gate separation layer, between the source and drain regions, wherein the source, the drain and the gate regions extend through the bulk passivation layer and the interfacial layer, to contact an upper surface of the heterojunction structure.

A group III-V semiconductor device comprising:

• an aluminum nitride (AlN) buffer layer disposed over a silicon (Si) substrate;
• an aluminum gallium nitride (AlGaN) buffer layer disposed over the AlN buffer layer;
• a gallium nitride (GaN) channel layer disposed over the AlGaN buffer layer;
• an AlGaN barrier layer disposed over the GaN channel layer;
• an AlN interfacial layer disposed over the AlGaN barrier layer and arranged along opposing sides of a source region and opposing sides of a drain region;
• a bulk oxide passivation layer disposed over the AlN buffer layer;
• and
• a gate region, comprising a gate electrode and a gate separation layer, laterally disposed between the source and drain regions, wherein the source, drain and gate regions extend through the AlN interfacial layer and the bulk oxide passivation layer to abut the AlGaN barrier layer.