Semiconductor device

A semiconductor device comprising:

• a wiring substrate having:
• a first surface,
• a plurality of internal terminals formed on the first surface,
• a second surface opposite to the first surface,
• a plurality of external terminals formed on the second surface, and respectively electrically connected with the plurality of internal terminals, and
• a plurality of wirings respectively electrically connecting the plurality of internal terminals with the plurality of external terminals,
• a semiconductor chip having a plurality of pads, and mounted over the first surface of the wiring substrate;
• and
• a plurality of conductive members respectively electrically connecting the plurality of pads with the plurality of internal terminals,
• wherein the plurality of pads include a first pad and a second pad located next to the first pad,
• wherein the plurality of internal terminals include a first internal terminal electrically connected with the first pad via a first conductive member of the plurality of conductive members, and a second internal terminal electrically connected with the second pad via a second conductive member of the plurality of conductive members,
• wherein the second internal terminal is located next to the first internal terminal,
• wherein the plurality of wirings include a first wiring connected to the first internal terminal, and a second wiring connected to the second internal terminal,
• wherein the first wiring and the second wiring constitute a differential pair for transmitting a differential signal,
• wherein each of the first wiring and the second wiring has a first portion, a second portion formed on the same wiring layer as the first portion, and a third portion formed between the first portion and the second portion,
• wherein, in plan view, the first portion of the first wiring and the first portion of the second wiring are extended in parallel with each other with a first clearance,
• wherein, in plan view, the second portion of the first wiring and the second portion of the second wiring are extended in parallel with each other with a second clearance, and
• wherein, in plan view, the third portion of the first wiring and the third portion of the second wiring are extended such that the third portion of the first wiring and the third portion of the second wiring are detoured in a direction to be made a clearance greater than the first clearance and the second clearance.