Integrated circuit packages with dual-sided stacking structure
AssigneeAltera Corporation
InventorMyung June Lee
Life of this patent
Estimating the term…
Abstract
An integrated circuit package may include a first integrated circuit die attached to a front surface of a second integrated circuit die. An intermediate layer made of a molding compound is formed to surround the second integrated circuit die in a “fan-out” arrangement while leaving a surface of the second integrated circuit die exposed. Accordingly, a group of via holes is then formed in the intermediate layer and filled with a conductive material. Such a configuration forms a dual-sided stacking structure. The stacking structure may also be applicable for package-on-package packages and fan-out wafer-level chip scale packages, in which the stacking structure is formed between two heterogeneous or homogeneous integrated circuit packages.
Claims21
An integrated circuit package produced by a process comprising:
- providing a first integrated circuit die;
- providing a second integrated circuit die having opposing first and second surfaces and attaching the first integrated circuit die to the first surface of the second integrated circuit die;
- forming an intermediate layer on the first integrated circuit die and surrounding the second integrated circuit die;
- forming a plurality of via holes in the intermediate layer;
- and
- filling the plurality of via holes with a conductive material after forming the plurality of via holes.
A method of fabricating an integrated circuit package, the method comprising:
- attaching a first integrated circuit die to a front surface of a second integrated circuit die;
- forming an intermediate layer that surrounds the second integrated circuit die;
- forming an additional intermediate layer over the front surface of the second integrated circuit die and the intermediate layer;
- forming a plurality of via holes in the additional intermediate layer;
- and
- performing a plugging process to fill the plurality of via holes with a conductive material.
A method of manufacturing a package-on-package device, the method comprising:
- mounting an integrated circuit die on a package substrate to form a first integrated circuit package;
- encapsulating the integrated circuit die with a molding compound;
- forming a plurality of openings in the molding compound, wherein each of the plurality of openings is filled with a conductive material through a squeeze casting process to form a plurality of conductive vias;
- forming a passivation layer over the integrated circuit die and the molding compound;
- and
- mounting a second integrated circuit package on the first integrated circuit package through the passivation layer.
Dependencies are inferred from the claim text.