Back to results
US 2016/0240451 A1Published application
Interconnect structure for semiconductor package and method of fabricating the interconnect structure
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChien-Ling HWANG, Bor-Ping JANG, Chung-Shi LIU, Hsin-Hung LIAO, Ying-Jui HUANG
Life of this patent
Estimating the term…
Abstract
A semiconductor package includes a carrier, at least and adhesive portion, a plurality of micro pins and a die. The carrier has a first surface and second surface opposite to the first surface. The adhesive portion is disposed on the first surface, and the plurality of the micro pins is disposed in the adhesive portions. The die is disposed on the remaining adhesive portion free of the micro pins.
Claims21
A semiconductor package structure, comprising:
- a carrier having a first surface and a second surface opposite to the first surface;
- at least an adhesive portion disposed on the first surface;
- a plurality of micro pins disposed in the adhesive portion;
- and
- at least a die disposed on the adhesive portion.
2 more elements
A semiconductor package structure, comprising:
- a molding compound;
- a plurality of micro pins disposed in the molding compound;
- at least a die disposed in the molding compound;
- and
- at least an adhesive portion immediately in contact with the die.
2 more elements
15-20. (canceled)
Dependencies are inferred from the claim text.