US 2016/0240264 A1 · SEMICONDUCTOR MEMORY DEVICE

Abstract

A semiconductor memory device includes a first memory cell, a first word line electrically connected to a gate of the first memory cell, a first bit line electrically connected to one end of the first memory cell, and a controller configured to execute a write operation, which includes a first cycle and a second cycle that is executed after the first cycle. The first cycle includes a first operation of applying a program voltage to the first word line, a second operation executed after the first operation of applying a first voltage to the first bit line and a second voltage lower than the first voltage to the first word line, and a third operation executed after the second operation of applying a verify voltage to the first word line. The second cycle includes the first operation and then the third operation, and excludes the second operation.

Claims20

Dependent claims

A semiconductor memory device comprising:

a first memory cell;
a first word line electrically connected to a gate of the first memory cell;
a first bit line electrically connected to one end of the first memory cell;
and
a controller configured to execute a write operation, which includes a plurality of cycles including a first cycle and a second cycle that is executed after the first cycle, wherein
the first cycle includes a first operation of applying a program voltage to the first word line, a second operation executed after the first operation of applying a first voltage to the first bit line and a second voltage lower than the first voltage to the first word line, and a third operation executed after the second operation of applying a verify voltage to the first word line, and
the second cycle includes the first operation and then the third operation, and excludes the second operation.

4 more elements

A method of executing a write operation in a semiconductor memory device that includes a first memory cell, a first word line electrically connected to a gate of the first memory cell, and a first bit line electrically connected to one end of the first memory cell, said method comprising:

executing the write operation in multiple cycles including a first cycle and a second cycle that is executed after the first cycle, wherein
the first cycle includes a first operation of applying a program voltage to the first word line, a second operation executed after the first operation of applying a first voltage to the first bit line and a second voltage lower than the first voltage to the first word line, and a third operation executed after the second operation of applying a verify voltage to the first word line, and
the second cycle includes the first operation and then the third operation, and excludes the second operation.

Dependencies are inferred from the claim text.

Semiconductor memory device

Life of this patent

Semiconductor memory device

Life of this patent

Abstract

Claims20