Memory programming method, memory control circuit unit and memory storage device

A memory storage device, comprising:

• a connection interface unit configured to couple to a host system;
• a rewritable non-volatile memory module comprising a plurality of memory cells;
• and
• a memory control circuit unit coupled to the connection interface unit and the rewritable non-volatile memory module,
• wherein the memory control circuit unit is configured to transmit a first write command sequence configured to instruct to perform a first programming process on the memory cells according to write data,
• wherein the memory control circuit unit is further configured to obtain a first programming result of the first programming process,
• wherein the memory control circuit unit is further configured to group the memory cells into a plurality of programming groups according to the first programming result,
• wherein the memory control circuit unit is further configured to transmit a second write command sequence configured to instruct to perform a second programming process on the memory cells according to the write data,
• wherein the second programming process comprises:
• programming a first programming group among the programming groups by using a first program voltage;
• and
• programming a second programming group among the programming groups by using a second program voltage, wherein the first program voltage and the second program voltage are different.

A memory control circuit unit configured to control a rewritable non-volatile memory module having a plurality of memory cells, the memory control circuit unit comprising:

• a host interface configured to couple to a host system;
• a memory interface configured to couple to the rewritable non-volatile memory module;
• and
• a memory management circuit coupled to the host interface and the memory interface,
• wherein the memory management circuit is configured to transmit a first write command sequence configured to instruct to perform a first programming process on the memory cells according to write data,
• wherein the memory management circuit is further configured to obtain a first programming result of the first programming process,
• wherein the memory management circuit is further configured to group the memory cells into a plurality of programming groups according to the first programming result,
• wherein the memory management circuit is further configured to transmit a second write command sequence configured to instruct to perform a second programming process on the memory cells according to the write data,
• wherein the second programming process comprises:
• programming a first programming group among the programming groups by using a first program voltage;
• and
• programming a second programming group among the programming groups by using a second program voltage, wherein the first program voltage and the second program voltage are different.