Flash Memory Device Configurable To Provide Read Only Memory Functionality
AssigneeSilicon Storage Technology, Inc.
InventorsHieu Van Tran, Anh Ly, Thuan Vu, Hung Quoc Nguyen
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Abstract
The disclosed embodiments comprise a flash memory device that can be configured to operate as a read only memory device. In some embodiments, the flash memory device can be configured into a flash memory portion and a read only memory portion.
Claims45
A non-volatile memory device comprising:
- an array of flash memory cells, the array comprising a first set of rows of flash memory cells and a second set of rows of flash memory cells;
- a first set of decoders configured to enable the first set of rows of flash memory cells to be erased and programmed;
- and
- a second set of decoders configured to prevent the second set of rows of flash memory cells from being erased and programmed.
A method of operating a non-volatile memory device comprising an array of flash memory cells, the array comprising a first set of rows of flash memory cells and a second set of rows of flash memory cells, the method comprising:
- receiving, by a first set of decoders, a first set of bits from a control portion of the array;
- receiving, by a second set of decoders, a second set of bits from the control portion of the array;
- enabling, by the first set of decoders, the first set of rows of flash memory cells to be erased and programmed;
- and
- disabling, by the second set of decoders, the second set of rows of flash memory cells from being erased and programmed.
A non-volatile memory device comprising:
- an array of flash memory cells, the array comprising a first set of rows of flash memory cells and a second set of rows of flash memory cells;
- a first set of decoders configured to enable the first set of rows of flash memory cells to be erased and programmed in response to a first set of bits stored in a control portion of the array;
- and
- a second set of decoders configured to prevent the second set of rows of flash memory cells from being erased and programmed in response to a second set of bits stored in a control portion of the array;
- and
- a security circuit for enabling the control portion to be erased and programmed when a first set of data is received that matches a second set of data stored in the control portion.
A method of operating a non-volatile memory device comprising an array of flash memory cells, the array comprising a first set of rows of flash memory cells and a second set of rows of flash memory cells, the method comprising:
- receiving, by a first set of decoders, a first set of bits from a control portion of the array;
- receiving, by a second set of decoders, a second set of bits from a control portion of the array;
- enabling, by the first set of decoders, the first set of rows of flash memory cells to be erased and programmed;
- disabling, by the second set of decoders, the second set of rows of flash memory cells from being erased and programmed;
- and
- receiving, by a security circuit, a first set of data and enabling the control portion to be erased and programmed if the first set of data matches a second set of data stored in the control portion.
Dependencies are inferred from the claim text.