US 2016/0240238 A1 · Setting of Reference Voltage for Data Sensing in Ferroelectric Memories

Abstract

A method of setting the reference voltage for sensing data states in integrated circuits including ferroelectric random access memory (FRAM) cells of the one-transistor-one capacitor (1T-1C) type. In an electrical test operation, some or all of the FRAM cells are programmed to a particular polarization state. A “shmoo” of the reference voltage for sensing the data state is performed, at one or more worst case electrical or environmental conditions for that data state, to determine a reference voltage limit at which the weakest cell fails to return the correct data when read. A configuration register is then written with a reference voltage based on this reference voltage limit, for example at the limit plus/minus a tolerance.

Claims22

Dependent claims

A method of setting a reference voltage in an integrated circuit including ferroelectric memory cells of the one transistor-one capacitor (1T-1C) type, comprising the steps of:

programming a plurality of the ferroelectric memory cells to a first data state, the first data state corresponding to a lower capacitance polarization state than a second data state;
iteratively reading the plurality of programmed ferroelectric memory cells at a plurality of reference voltage levels to identify a first reference voltage limit corresponding to the reference voltage level at which a weakest memory cell returns the second data state when read;
configuring the integrated circuit to set the reference voltage at an operating level corresponding to the first reference voltage limit.

Dependencies are inferred from the claim text.

Setting of Reference Voltage for Data Sensing in Ferroelectric Memories

Life of this patent

Setting of Reference Voltage for Data Sensing in Ferroelectric Memories

Life of this patent

Abstract

Claims22