Adjusting resistive memory write driver strength based on a mimic resistive memory write operation
AssigneeQUALCOMM Incorporated
InventorsTaehyun Kim, Jung Pill Kim, Sungryul Kim
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AssigneeQUALCOMM Incorporated
InventorsTaehyun Kim, Jung Pill Kim, Sungryul Kim
Estimating the term…
Aspects of adjusting resistive memory write driver strength based on a mimic resistive memory write operation are disclosed. In one aspect, a write driver adjustment circuit is provided to adjust a write current provided by a write driver to a resistive memory for write operations. The write driver adjustment circuit includes a mimic write driver configured to provide a mimic write current that mimics the write current provided to the resistive memory. The mimic write current is applied to a mimic resistive memory that contains mimic resistive memory elements that mimic a resistance distribution of the resistive memory. When the mimic write current is applied, a mimic voltage is generated across the mimic resistive memory elements. The write driver adjustment circuit is configured to adjust the write current based on the mimic voltage so that the write current is sufficient for write operations, but low enough to reduce breakdown.
A write driver adjustment circuit for adjusting a write current for a resistive memory, comprising:
A write driver adjustment circuit for adjusting a write current for a resistive memory, comprising:
A method of adjusting a write driver current to reduce a breakdown failure rate of a corresponding resistive memory system, comprising:
A magnetic random access memory (MRAM) system comprising:
Dependencies are inferred from the claim text.