Semiconductor device having high-voltage transistor
AssigneeSK hynix Inc.
InventorDong Hwan LEE
Life of this patent
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Abstract
A semiconductor device includes a semiconductor device, comprising a memory cell array including a plurality of memory cells connected to a first bit line and a second bit line, respectively, a page buffer group, and bit line selection circuits including a plurality of selection circuit blocks to connect the first bit lines or the second bit lines to the page buffer group, wherein each of the selection circuit blocks includes a first contact region and a second contact region to which the first and second bit lines coupled, and same bit lines of the first and second bit lines are coupled to contact regions adjacent to one another of the first and second contact regions included in bit line selection circuits adjacent to one another of the bit line selection circuits.
Claims10
A semiconductor device, comprising:
- a memory cell array including a plurality of memory cells connected to a first bit line and a second bit line, respectively;
- a page buffer group;
- and
- bit line selection circuits including a plurality of selection circuit blocks to connect the first bit lines or the second bit lines to the page buffer group,
- wherein each of the selection circuit blocks includes a first contact region and a second contact region to which the first and second bit lines coupled, and same bit lines of the first and second bit lines are coupled to contact regions adjacent to one another of the first and second contact regions included in bit line selection circuits adjacent to one another of the bit line selection circuits.
A semiconductor device, comprising:
- a memory cell array including a plurality of memory cells connected to an even bit line and an odd bit line arranged in parallel, respectively;
- a page buffer group;
- and
- bit line selection circuits including a plurality of selection circuit blocks to connect the even bit line or the odd bit line to the page buffer group, wherein the selection circuit blocks include even bit line contact regions to which the even bit lines are connected and odd bit line contact regions to which the odd bit lines are connected, and the even bit line contact regions or the odd bit line contact regions included in the bit line selection circuits different one another are arranged to be adjacent to one another.
Dependencies are inferred from the claim text.