Shared gate fed sense amplifier

A method, comprising:

• receiving a read command for a memory, wherein the memory includes a plurality of banks, a plurality of amplifiers, and wherein each bank of the plurality of banks includes a plurality of data storage cells, wherein each data storage cell of the plurality of data storage cells included in a first bank is coupled to the first pair of data lines, and wherein each data storage cell of the plurality of data storage cells included in a second bank of the plurality banks is coupled to a second pair of data lines;
• selecting a given data storage cell of the plurality of data storage cells included in the first bank of the plurality of banks dependent upon the read command;
• and
• amplifying, by a given amplifier of the plurality of amplifiers, a first signal generated by the given data storage cell, wherein the given amplifier is coupled to the first bank of the plurality of banks and the second bank of the plurality of banks, wherein the first signal generated by the given data storage cell is differentially encoded on the first pair of data lines included in the first bank;
• and
• wherein each amplifier of the plurality of amplifiers includes a first pair of metal-oxide semiconductor field-effect transistors (MOSFETs) and a second pair of MOSFETs, wherein a gate terminal of each MOSFET of the first pair of MOSFETs is coupled to a respective one of the first pair of data lines, and wherein a gate terminal of each MOSFET of the second pair of MOSFETs is coupled to a respective one of the second pair of data lines.

A system, comprising:

• a processor;
• and
• a memory coupled to the processor, wherein the memory includes circuitry, a plurality of banks and a plurality of amplifiers, wherein each bank of the plurality of banks includes a plurality of data storage cells, wherein each data storage cell of the plurality of data storage cells in a first bank is coupled to a first pair of data lines, and wherein each data storage cell of the plurality of data storage cells in a second bank is coupled to a second pair of data lines;
• wherein the circuitry is configured to:
• receive a read command from the processor;
• and
• select a given data storage cell in the first bank dependent upon the read command;
• wherein a given amplifier coupled to the first bank and the second bank is configured to amplify a first signal generated by the given data storage cell, wherein the first signal is differentially encoded on the first pair of data lines;
• and
• wherein the given amplifier includes a first pair of n-channel metal-oxide semiconductor field-effect transistors (MOSFETs) and a second pair of n-channel MOSFETs, wherein a gate terminal of each MOSFET of the first pair of MOSFETs is coupled to a respective one of the first pair of data lines, and wherein a gate terminal of each MOSFET of the second pair of MOSFETs is coupled to a respective one of the second pair of data lines.