US 2016/0240145 A1 · SCAN DRIVER CIRCUIT AND DRIVING METHOD FOR THE SCAN DRIVER CIRCUIT

Abstract

A scan driving circuit includes a plurality of stages, each having a shift register and a scan signal output unit. The shift register has a first node to receive a first driving voltage according to a control signal and a second node to receive the first driving voltage according to a reset signal. The scan signal output unit outputs scan signals to respective scan lines. The scan signal output unit has a plurality of clock switches controlled according to a voltage of the first node and a plurality of switches controlled according to a voltage of the second node. The clock switches sequentially output clock signals to respective third nodes, which are connected to respective scan lines. The switches output a second driving voltage to the third nodes.

Claims18

Dependent claims

A scan driving circuit, comprising:

a plurality of stages, each of the stages including:
a shift register including a first node to receive a first driving voltage according to a control signal and a second node to receive the first driving voltage according to a reset signal;
and
a scan signal output unit to output a plurality of scan signals to a respective plurality of scan lines, the scan signal output unit including a plurality of clock switches controlled according to a voltage of the first node and a plurality of switches controlled according to a voltage of the second node, wherein:
the clock switches are to sequentially output a plurality of clock signals to a respective plurality of third nodes, the third nodes connected to respective ones of the scan lines, and
the switches are to output a second driving voltage to the third nodes connected to respective one of the scan lines.

3 more elements

A method for driving a scan driving circuit including a plurality of stages, each of the stages including a shift register and a scan signal output unit, the shift register including a first node and a second node, the scan signal output unit including a plurality of clock switches controlled according to a voltage of the first node and a plurality of switches controlled according to a voltage of the second node, the method comprising:

applying a first driving voltage to the first node according to a control signal;
inputting a plurality of clock signals to each of the plurality of stages;
sequentially outputting the clock signals to nodes connected to a respective plurality of scan lines;
outputting a carry signal according to a COM clock signal;
applying the first driving voltage to the second node according to a reset signal;
and
outputting a second driving voltage to the nodes connected to the scan lines.

4 more elements

Dependencies are inferred from the claim text.

Scan driver circuit and driving method for the scan driver circuit

Life of this patent

Scan driver circuit and driving method for the scan driver circuit

Life of this patent

Abstract

Claims18