Systems and methods for providing kernel scheduling of volatile memory maintenance events
AssigneeQUALCOMM Incorporated
InventorsDEXTER TAMIO CHUN, YANRU LI
Life of this patent
Estimating the term…
Abstract
Systems, methods, and computer programs are disclosed for scheduling volatile memory maintenance events. One embodiment is a method comprising: a memory controller determining a time-of-service (ToS) window for executing a maintenance event for a volatile memory device coupled to the memory controller via a memory data interface; the memory controller providing an interrupt signal to a processing unit; determining a priority for the maintenance event; and scheduling the maintenance event according to the priority.
Claims30
A method for scheduling volatile memory maintenance events, the method comprising:
- a memory controller determining a time-of-service (ToS) window for executing a maintenance event for a volatile memory device coupled to the memory controller via a memory data interface;
- the memory controller providing an interrupt signal to a processing unit;
- determining a priority for the maintenance event;
- and
- scheduling the maintenance event according to the priority.
A system for scheduling volatile memory maintenance events, the system comprising:
- means for determining a time-of-service (ToS) window for executing a maintenance event for a volatile memory device coupled to a memory controller via a memory data interface;
- means for providing an interrupt signal to a processing unit;
- means for determining a priority for the maintenance event;
- and
- means for scheduling the maintenance event according to the priority.
A computer program embodied in a memory and executable by a processor for scheduling volatile memory maintenance events, the computer program comprising logic configured to:
- determine a time-of-service (ToS) window for executing a maintenance event for a volatile memory device coupled to the memory controller via a memory data interface;
- provide an interrupt signal to a processing unit;
- determine a priority for the maintenance event;
- and
- schedule the maintenance event according to the priority.
A system for scheduling volatile memory maintenance events, the system comprising:
- a dynamic random access memory (DRAM) device;
- a system on chip (SoC) comprising a processing device and a DRAM controller electrically coupled to the DRAM device via a memory data interface, the DRAM controller comprising a scheduler module configured to determine a time-of-service (ToS) window for executing a maintenance event for the DRAM device, the ToS window defined by an interrupt signal provided to the processing device and a deadline for executing the maintenance;
- and
- the processing unit configured to:
- receive the interrupt signal from the DRAM controller;
- in response to the interrupt signal, determine a priority for the maintenance event;
- and
- schedule the maintenance event according to the priority.
Dependencies are inferred from the claim text.