Dynamic resource allocation across dispatch pipes

A computer program product for facilitating allocation of architected registers to instructions executing within a computing environment, said computer program product comprising:

• a computer readable storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method comprising:
• determining, by a processor, for an instruction, a number of architected registers to be used for the instruction;
• checking whether the number of architected registers to be used for the instruction is greater than a number of architected registers defined for a pipe on which the instruction is to be dispatched;
• and
• assigning a source port of an additional pipe to the instruction, based on the checking indicating the number of architected registers to be used for the instruction is greater than the number of architected registers defined for the pipe on which the instruction is to be dispatched, wherein based on assigning the source port, an additional architected register is available to the instruction.

A method of facilitating allocation of architected registers to instructions executing within a computing environment, said method comprising:

• determining, by a processor, for an instruction, a number of architected registers to be used for the instruction;
• checking whether the number of architected registers to be used for the instruction is greater than a number of architected registers defined for a pipe on which the instruction is to be dispatched;
• and
• assigning a source port of an additional pipe to the instruction, based on the checking indicating the number of architected registers to be used for the instruction is greater than the number of architected registers defined for the pipe on which the instruction is to be dispatched, wherein based on assigning the source port, an additional architected register is available to the instruction.