Bifurcated memory management for memory elements
AssigneeQUALCOMM Incorporated
InventorsAmit Gil, Assaf Shacham
Life of this patent
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Abstract
Bifurcated memory management for memory elements techniques are disclosed. In one aspect, a memory element includes a self-managed portion and a portion that is managed by a remote host. Software that needs low latency access may be stored in the portion of the memory element that is managed by the remote host and other software may be stored in the portion of the memory element that is managed by the memory element. By providing such bifurcated memory management of the memory element, a relatively inexpensive memory element may be used to store software while at the same time allowing low latency (albeit at low throughputs) access to sensitive software elements with minimal bus logic.
Claims24
A method of controlling a memory element, comprising:
- generating, at a host, a first instruction for a managed portion of a memory element;
- associating the first instruction with a logical address of the memory element;
- transmitting the first instruction to the managed portion of the memory element through a communication bus using a bus protocol;
- generating, at the host, a second instruction for an unmanaged portion of the memory element;
- associating the second instruction with a physical address of the memory element;
- and
- transmitting the second instruction to the unmanaged portion of the memory element through the communication bus using the bus protocol.
A method of operation for a memory element, comprising:
- receiving, from a communication bus using a bus protocol, a first instruction from a host, the first instruction including a logical address for a managed portion of a memory element;
- and
- receiving, from the communication bus using the bus protocol, a second instruction from the host, the second instruction including a physical address for an unmanaged portion of the memory element.
A memory element comprising:
- a controller;
- a first storage space configured to be managed by the controller;
- and
- a second storage space configured to be managed by a host remotely from a memory element.
A host comprising:
- a bus interface configured to be coupled to a communication bus;
- a transceiver operatively coupled to the bus interface;
- and
- a controller operatively coupled to the transceiver, the controller configured to:
- generate a first instruction for a managed portion of a memory element;
- associate the first instruction with a logical address of the memory element;
- instruct the transceiver to transmit the first instruction to the managed portion of the memory element through the communication bus using a bus protocol;
- generate a second instruction for an unmanaged portion of the memory element;
- associate the second instruction with a physical address of the memory element;
- and
- instruct the transceiver to transmit the second instruction to the unmanaged portion of the memory element through the communication bus using the bus protocol.
Dependencies are inferred from the claim text.