Performing power management in a multicore processor
AssigneeIntel Corporation
InventorsVICTOR W. LEE, EDWARD T. GROCHOWSKI, DAEHYUN KIM, YUXIN BAI, SHENG LI, NAVEEN K. MELLEMPUDI, DHIRAJ D. KALAMKAR
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AssigneeIntel Corporation
InventorsVICTOR W. LEE, EDWARD T. GROCHOWSKI, DAEHYUN KIM, YUXIN BAI, SHENG LI, NAVEEN K. MELLEMPUDI, DHIRAJ D. KALAMKAR
Estimating the term…
In an embodiment, a processor includes: a plurality of first cores to independently execute instructions, each of the plurality of first cores including a plurality of counters to store performance information; at least one second core to perform memory operations; and a power controller to receive performance information from at least some of the plurality of counters, determine a workload type executed on the processor based at least in part on the performance information, and based on the workload type dynamically migrate one or more threads from one or more of the plurality of first cores to the at least one second core for execution during a next operation interval. Other embodiments are described and claimed.
A processor comprising:
A machine-readable medium having stored thereon data, which if used by at least one machine, causes the at least one machine to fabricate at least one integrated circuit to perform a method comprising:
A system comprising:
Dependencies are inferred from the claim text.