Electrostatic protection circuit and semiconductor device including the same
AssigneeSK hynix Inc.
InventorNam Pyo HONG
Life of this patent
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Abstract
An electrostatic protection circuit may include a test pad configured to receive a first signal in a test mode. The electrostatic protection circuit may include a bump array configured to receive a second signal in a normal mode. The electrostatic protection circuit may include a buffer array configured to transmit the first signal or the second signal into a semiconductor device. The electrostatic protection circuit may include an electrostatic protection unit coupled with the test pad and the bump array, and configured to block static electricity included in the first signal and the second signal.
Claims20
An electrostatic protection circuit comprising:
- a test pad configured to receive a first signal in a test mode;
- a bump array configured to receive a second signal in a normal mode;
- a buffer array configured to transmit the first signal or the second signal into a semiconductor device;
- and
- an electrostatic protection unit coupled with the test pad and the bump array, and configured to block static electricity included in the first signal and the second signal.
A semiconductor device comprising multiple chips that are stacked, wherein one chip from the multiple chips that are stacked comprises:
- a plurality of bump arrays configured to input/output signals between the multiple chips that are stacked;
- a test pad array configured to enable direct probing;
- and
- an electrostatic protection unit coupled with the test pad array and the plurality of bump arrays, and configured to block static electricity included in a signal inputted through the test pad array and in a signal inputted through the plurality of bump arrays.
A semiconductor device comprising multiple chips that are stacked, wherein one chip from the multiple chips that are stacked comprises:
- a test pad configured to receive a first signal in a test mode;
- a bump array configured to receive a second signal in a normal mode;
- a buffer array configured to transmit the first signal or the second signal to the semiconductor device;
- and
- an electrostatic protection unit coupled with the test pad and the bump array, and configured to block static electricity included in the first signal and the second signal.
Dependencies are inferred from the claim text.