Modulation circuit and operating method thereof
AssigneeMediatek Inc.
InventorsYen Lin Huang, Hsiang-Hui Chang, Hsin-Hung Chen
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Abstract
A modulation circuit includes a phase locked loop (PLL) circuit, a scalar circuit and a sigma-delta modulator. The PLL circuit is for generating an output oscillating signal in response to a reference signal, a first control signal and a second control signal. The scalar circuit is for generating the first control signal in response to modulating data to control frequency deviation of the output oscillating signal, wherein the first control signal is in a digital form. The sigma-delta modulator is for generating the second control signal according to the modulating data to modulate a divider value of a frequency divider of the PLL circuit.
Claims23
A modulation circuit, comprising:
- a phase locked loop (PLL) circuit, for generating an output oscillating signal in response to a reference signal, a first control signal and a second control signal;
- a scalar circuit, coupled to the PLL circuit, for generating the first control signal in response to modulating data to control frequency deviation of the output oscillating signal, wherein the first control signal is in a digital form;
- and
- a sigma-delta modulator for generating the second control signal according to the modulating data to modulate a divider value of a frequency divider of the PLL circuit.
An operating method of a modulation circuit, comprising:
- generating, by a phase locked loop (PLL) circuit, an output oscillating signal in response to a reference signal, a first control signal and a second control signal;
- generating, by a scalar circuit coupled to the PLL circuit, the first control signal in response to modulating data to control frequency deviation of the output oscillating signal, wherein the first control signal is in a digital form;
- and
- generating, by a sigma-delta modulator coupled to the PLL circuit, the second control signal according to the modulating data to modulate a divider value of a frequency divider of the PLL circuit.
Dependencies are inferred from the claim text.