Interoperation of switch line card and programmable line card
AssigneeHangzhou H3C Technologies Co., Ltd.
InventorsDan MENG, Yunfeng ZHAO
Life of this patent
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Abstract
When needing to forward a packet from a switch line card to a programmable line card, the switch line card may encapsulate a pseudo-Layer 2 header for the packet based on uplink forwarding process of the switch line card. The pseudo-Layer 2 header may carry an adjacency table index and an egress interface table index which is used by the programmable line card. Correspondingly, the programmable line card may obtain the adjacency table index and the egress interface table index from the pseudo-Layer 2 header of the packet, and then may re-encapsulate a real Layer 2 header for the packet based on downlink forwarding process of the programmable line card, and transmit the packet through a corresponding egress interface.
Claims20
A method for interoperating between a switch line card and a programmable line card, comprising:
- receiving a packet through an external interface of the switch line card, when a corresponding forward information base (FIB) entry is searched out in a FIB table of a switch chip of the switch line card, searching for, by the switch chip, an adjacency table entry and an egress interface entry, which are respectively a pseudo-adjacency table entry and a pseudo-egress interface entry when a downlink forwarding line card is a programmable line card;
- encapsulating, by the switch chip, an inter-board forwarding header and an Ethernet Layer 2 header for the packet, based on the adjacency table entry and the egress interface entry searched out, and forwarding the packet encapsulated to the downlink forwarding line card through a backboard, wherein the Ethernet Layer 2 header is a pseudo-Layer 2 header when the downlink forwarding line card is the programmable line card;
- identifying, by a programmable chip of the programmable line card the packet comes from an uplink switch line card, searching for a corresponding adjacency table entry and a corresponding egress interface entry;
- re-encapsulating, by the programmable chip, a Layer 2 header of a corresponding interface type for the packet, and transmitting the packet encapsulated through a corresponding external interface of the programmable line card.
A network device comprising a backboard and a forwarding line card connected to the backboard, wherein the forwarding line card comprises a switch line card and a programmable line card;
- the switch line card including a switch chip, when receiving a packet through an external interface of the switch line card and a corresponding forward information base (FIB) entry is searched out in a FIB table of the switch chip, the switch chip is to search for a corresponding adjacency table entry and a corresponding egress interface entry, which are respectively a pseudo-adjacency table entry and a pseudo-egress interface entry, when a downlink forwarding line card is the programmable line card;
- the switch chip is further to encapsulate an inter-board forwarding header and an Ethernet Layer 2 header for the packet, based on the adjacency table entry and the egress interface entry searched out, and forward the packet encapsulated to the downlink forwarding line card through the backboard, wherein the Ethernet Layer 2 header is a pseudo-Layer 2 header, when the downlink forwarding line card is the programmable line card;
- when identifying that the packet comes from an uplink switch line card, a programmable chip of the programmable line card is to respectively search for a corresponding adjacency table entry and a corresponding egress interface entry, re-encapsulate a Layer 2 header of a corresponding interface type for the packet, and transmit the packet encapsulated through a corresponding external interface of the programmable line card.
The device according to 13, wherein the programmable chip of the programmable line card is further to search for the corresponding adjacency table entry and the corresponding egress interface entry in an adjacency table and an egress interface table of the programmable chip, based on the adjacency table index and the egress interface index carried by the pseudo-Layer 2 header of the packet.
Dependencies are inferred from the claim text.