Frequency Planning for Digital Power Amplifier

An apparatus comprising:

• processor electronics;
• transceiver electronics coupled with the processor electronics, the transceiver electronics comprising modulation circuitry and a digital power amplifier coupled with the modulation circuitry;
• a clock source coupled with the transceiver electronics to provide a clock signal from the clock source to the digital power amplifier at a sampling clock frequency;
• a local oscillator coupled with the transceiver electronics to provide a local oscillator signal from the local oscillator to the modulation circuitry at a local oscillator frequency;
• and
• one or more antennas coupled with the digital power amplifier in the transceiver electronics;
• wherein the local oscillator frequency is an integer multiple of the sampling clock frequency;
• and
• wherein a parasitic frequency response of circuitry in the transceiver electronics acts as an implicit out-of-band filter to remove alias signals.

A method comprising:

• upconverting a baseband signal from processor electronics using a local oscillator signal from a local oscillator, which has a local oscillator frequency, to generate a transmission signal in transceiver electronics;
• feeding the transmission signal to a digital power amplifier associated with the transceiver electronics;
• sampling the transmission signal in the digital power amplifier using a clock signal from a clock source, which has a clock frequency, to generate a sampled transmission signal;
• amplifying the sampled transmission signal in the digital power amplifier to generate an amplified output signal;
• and
• transmitting the output signal using one or more antennas coupled with the digital power amplifier associated with the transceiver electronics;
• wherein the local oscillator frequency is an integer multiple of the clock frequency;
• and
• wherein a parasitic frequency response of circuitry in the transceiver electronics acts as an implicit out-of-band filter to remove alias signals.