Programmable logic circuit and nonvolatile fpga

A programmable logic circuit comprising:

• a plurality of first wiring lines;
• a plurality of second wiring lines intersecting with the first wiring lines in intersecting areas;
• a plurality of third wiring lines;
• a plurality of cells provided in the intersecting areas, at least one of the cells including a first transistor with a source, a drain, and a gate, and a programmable device with a first terminal and a second terminal, the first terminal connecting to one of the source and the drain of the first transistor, the second terminal being connected to one of the second wiring lines, the other of the source and the drain of the first transistor being connected to one of the first wiring lines, and the gate of the first transistor being connected to one of the third wiring lines;
• a plurality of first cut-off transistors each including a source and a drain, one of the source and the drain being connected to the one of the second wiring lines;
• a plurality of first CMOS inverters corresponding to the first cut-off transistors, each of the first CMOS inverters including an input terminal, the input terminal being connected to the other of the source and the drain of the corresponding one of the first cut-off transistors.