Back to results
US 2016/0111553 A1Published application
Localized fin width scaling using a hydrogen anneal
AssigneesInternational Business Machines Corporation, Renesas Electronics Corporation
InventorsVEERARAGHAVAN S. BASKER, SHOGO MOCHIZUKI, TENKO YAMASHITA, CHUN-CHEN YEH
Life of this patent
Estimating the term…
Abstract
Transistors including one or more semiconductor fins formed on a substrate. The one or more semiconductor fins are thinner in a channel region than in source and drain regions and have rounded corners formed by an anneal in a gaseous environment. A gate dielectric layer is on the channel region of the one or more semiconductor fins, conforming to the contours of the one or more semiconductor fins. A gate structure is on the gate dielectric layer.
Claims10
A transistor, comprising:
- one or more semiconductor fins formed on a substrate, wherein the one or more semiconductor fins are thinner in a channel region than in source and drain regions and have rounded corners formed by an anneal in a gaseous environment;
- a gate dielectric layer on the channel region of the one or more semiconductor fins, conforming to the contours of the one or more semiconductor fins;
- and
- a gate structure on the gate dielectric layer.
1 more element
Dependencies are inferred from the claim text.