Semiconductor device and method for manufacturing the same

A semiconductor device comprising:

• an oxide stack comprising:
• an oxide layer;
• and
• an oxide semiconductor layer over the oxide layer, wherein an electron affinity of the oxide semiconductor layer is higher than an electron affinity of the oxide layer by 0.1 eV or more;
• a gate insulating layer in contact with the oxide stack;
• and
• a gate electrode layer overlapping with the oxide stack with the gate insulating layer there between,
• wherein a spin density corresponding to a signal at a g-factor of greater than or equal to 1.90 and less than or equal to 1.95 is 1.5×1012 spins/cm2 or less and a spin density corresponding to a signal at a g-factor of greater than or equal to 2.00 and less than or equal to 2.01 is 2×1012 spins/cm2 or more in electron spin resonance spectroscopy.

A semiconductor device comprising:

• a base insulating layer;
• an oxide stack comprising:
• an oxide layer over the base insulating layer;
• and
• an oxide semiconductor layer over the oxide layer, wherein an electron affinity of the oxide semiconductor layer is higher than an electron affinity of the oxide layer by 0.1 eV or more;
• a source electrode layer and a drain electrode layer in contact with the oxide stack;
• a gate insulating layer over the source electrode layer and the drain electrode layer;
• a gate electrode layer over the gate insulating layer;
• and
• an interlayer insulating layer over the gate electrode layer,
• wherein the oxide semiconductor layer has a spin density of 1.5×1018 spins/cm2 or less corresponding to a signal at a g-factor of greater than or equal to 1.90 and less than or equal to 1.95 in electron spin resonance spectroscopy, and
• wherein the gate insulating layer has a spin density of 2×1018 spins/cm2 or more corresponding to a signal at a g-factor of greater than or equal to 2.00 and less than or equal to 2.01 in electron spin resonance spectroscopy.

A semiconductor device comprising:

• an oxide stack comprising:
• a first oxide layer;
• an oxide semiconductor layer over the first oxide layer;
• and
• a second oxide layer over the oxide semiconductor layer, wherein an electron affinity of the oxide semiconductor layer is higher than an electron affinity of the first oxide layer or the second oxide layer by 0.1 eV or more;
• a source electrode layer and a drain electrode layer in contact with the oxide stack;
• a gate insulating layer in contact with the oxide stack;
• and
• a gate electrode layer overlapping with the oxide stack with the gate insulating layer there between,
• wherein the oxide semiconductor layer has a spin density of 1.5×1018 spins/cm2 or less corresponding to a signal at a g-factor of greater than or equal to 1.90 and less than or equal to 1.95 in electron spin resonance spectroscopy, and
• wherein the gate insulating layer has a spin density of 2×1018 spins/cm2 or more corresponding to a signal at a g-factor of greater than or equal to 2.00 and less than or equal to 2.01 in electron spin resonance spectroscopy.