Metal Gate with Silicon Sidewall Spacers

A method comprising:

• removing a dummy gate stack to form an opening in an inter-layer dielectric;
• forming a gate dielectric on sidewalls and a top surface of a protruding semiconductor fin in the opening;
• forming a conductive diffusion barrier layer over the gate dielectric, wherein the conductive diffusion barrier layer extends into the opening;
• forming a polysilicon layer over the conductive diffusion barrier layer and extending into the opening;
• performing an anneal on the polysilicon layer and the gate dielectric;
• after the anneal, performing an anisotropic etch on the polysilicon layer to form a polysilicon corner spacer at a corner of the opening, wherein a polymer is formed to cover the polysilicon corner spacer;
• etching the polymer, with the polysilicon corner spacer remaining after the etching;
• and
• after the anisotropic etch, forming a conductive layer over the conductive diffusion barrier layer and the polysilicon corner spacer.

A device comprising:

• an isolation region;
• a protruding semiconductor fin over top surfaces of the isolation region;
• and
• a gate stack on a top surface and sidewalls of the protruding semiconductor fin, wherein the gate stack comprises:
• a gate dielectric;
• a conductive diffusion barrier layer over the gate dielectric;
• a silicon corner spacer over the conductive diffusion barrier layer, wherein the silicon corner spacer is at a bottom corner of the conductive diffusion barrier layer;
• and
• a conductive layer over and contacting the silicon corner spacer, wherein the conductive diffusion barrier layer, the silicon corner spacer, and the conductive layer form a portion of a gate electrode.