Semiconductor device

A semiconductor device, comprising:

• a semiconductor substrate;
• a front surface electrode located on a front surface of the semiconductor substrate;
• and
• a rear surface electrode located on a rear surface of the semiconductor substrate,
• wherein
• a plurality of dummy trenches and a grid-structured gate trench are provided in the front surface, the grid-structured gate trench being located between the dummy trenches,
• the grid-structured gate trench comprises:
• a plurality of first gate trenches extending along the dummy trenches on the front surface;
• and
• a plurality of second gate trenches connecting the first gate trenches to each other,
• a gate insulating film and a gate electrode are located in the grid-structured gate trench, the gate electrode being insulated from the semiconductor substrate by the gate insulating film,
• a dummy insulating film and a dummy electrode are located in the respective dummy trenches, each dummy electrode being electrically separated from the gate electrode and insulated from the semiconductor substrate by the dummy insulating film, and
• the semiconductor substrate comprises:
• an emitter region being of an n-type, located in a cell region which is a region surrounded by the first gate trenches and the second gate trenches, and being in contact with the gate insulating film and the front surface electrode;
• a first anode region being of a p-type, located in the cell region, being in contact with the gate insulating film at a position on a rear surface side of the emitter region, and being in contact with the front surface electrode;
• a first barrier region being of the n-type, located in the cell region, and being in contact with the gate insulating film at a position on the rear surface side of the first anode region;
• a first pillar region being of the n-type, located in the cell region, extending along a thickness direction of the semiconductor substrate, being in contact with the front surface electrode, connected to the first barrier region, and separated from the gate insulating film;
• a drift region being of the n-type, located on the rear surface side of the first barrier region, separated from the first anode region by the first barrier region, and having an n-type impurity concentration lower than that in the first barrier region;
• a collector region being of the p-type and in contact with the rear surface electrode;
• and
• a cathode region being of the n-type, being in contact with the rear surface electrode, and having an n-type impurity concentration higher than that in the drift region.