Electronic circuits including a mosfet and a dual-gate jfet
AssigneeACCO Corporation
InventorDenis A. Masliah
Life of this patent
Estimating the term…
Abstract
Electronic circuits and methods are provided for various applications including signal amplification. An exemplary electronic circuit comprises a MOSFET and a dual-gate JFET in a cascode configuration. The dual-gate JFET includes top and bottom gates disposed above and below the channel. The top gate of the JFET is controlled by a signal that is dependent upon the signal controlling the gate of the MOSFET. The control of the bottom gate of the JFET can be dependent or independent of the control of the top gate. The MOSFET and JFET can be implemented as separate components on the same substrate with different dimensions such as gate widths.
Claims9
A MOS device comprising:
- a substrate including a first well defined within the substrate, the well characterized by a top surface and having, defined within the well—
- a bottom gate,
- a first channel defined between the bottom gate and the top surface,
- a first source,
- a first drain,
- a second drain between the first drain and the first source,
- a first gate between the first drain and the second drain, and
- a gap between the first source and the second drain;
- a dielectric layer disposed above the top surface of the first well and aligned with the gap;
- and
- a second gate disposed above the dielectric layer and aligned with the gap.
Dependencies are inferred from the claim text.