Multilevel mask circuit fabrication and multilayer circuit

A circuit fabrication system comprising:

• a multilevel mask applicator to apply a multilevel mask to a first conductor layer on a substrate;
• a first etching subsystem to etch and remove a portion of the first conductor layer exposed by the multilevel mask, the etching subsystem to provide undercutting at a periphery the multilevel mask;
• a deposition subsystem to deposit a second conductor layer over the multilevel mask;
• and
• a mask material applicator to cover a surface of the second conductor layer with another mask material;
• a mask erosion subsystem to erode the other mask material and expose a portion of the second conductor layer overlying the multilevel mask;
• and
• a second etching subsystem to remove the exposed portion of the second conductor layer.

A multilayer circuit comprising:

• a first conductor layer comprising a patterned portion of a bridged gapped conductor having a plurality of traces separated by gaps, the gaps being periodically bridged to electrically connect adjacent parallel traces to one another;
• a second conductor layer adjacent the first conductor layer;
• and
• an insulating layer to electrically isolate a portion of the bridged gapped conductor of the first conductor layer from an overlying portion of the second conductor layer, wherein the gaps in the patterned portion of the bridged gapped conductor layer one or both of physically and electrically further isolate the first conductor layer from the second conductor layer.