MOSFETs with Channels on Nothing and Methods for Forming the Same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsGeorgios Vellianitis, Mark van Dal, Blandine Duriez
Life of this patent
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Abstract
A method includes performing an epitaxy to grow a semiconductor layer, which includes a top portion over a semiconductor region. The semiconductor region is between two insulation regions that are in a substrate. The method further includes recessing the insulation regions to expose portions of sidewalls of the semiconductor region, and etching a portion of the semiconductor region, wherein the etched portion of the semiconductor region is under and contacting a bottom surface of the semiconductor layer, wherein the semiconductor layer is spaced apart from an underlying region by an air gap. A gate dielectric and a gate electrode are formed over the semiconductor layer.
Claims20
A structure comprising:
- a semiconductor region over a substrate;
- a semiconductor layer over the semiconductor region, the semiconductor layer comprising:
- a narrow portion;
- and
- two wide portions wider than the narrow portion connected to opposite ends of the narrow portion;
- an air gap underlying the narrow portion of the semiconductor layer, the semiconductor layer being supported by portions of the semiconductor region underlying the two wide portions of the semiconductor layer;
- a gate dielectric on a top surface and sidewalls of the narrow portion of the semiconductor layer;
- and
- a gate electrode over the gate dielectric.
A device comprising:
- insulation regions on a substrate, the insulation regions being spaced apart from each other by a space;
- a channel region over the substrate and aligned to the space;
- an air gap underlying and aligned to the channel region, the air gap comprising the space;
- a gate dielectric on a top surface and sidewalls of the channel region;
- and
- a gate electrode over the gate dielectric, the channel region, the gate dielectric, and the gate electrode forming parts of a transistor, and the air gap comprising a portion interposed between portions of the gate electrode.
A method comprising:
- epitaxially growing a semiconductor layer on a top surface a semiconductor region, the semiconductor region protruding from between two insulation regions;
- recessing the insulation regions to expose portions of sidewalls of the semiconductor region;
- etching a portion of the semiconductor region to form an air gap between the semiconductor layer, a bottom portion of the semiconductor region, and the insulation regions;
- forming a gate dielectric over the semiconductor layer;
- and
- forming a gate electrode over the gate dielectric.
Dependencies are inferred from the claim text.