Use of ion beam etching to generate gate-all-around structure

An apparatus for forming channels or nanowires for a gate-all-around device or other electronic device on a semiconductor substrate, the apparatus comprising:

• a reaction chamber;
• a plasma source;
• a mechanism configured to orient the substrate with respect to an ion trajectory in at least a first orientation and a second orientation by (i) orienting the substrate and/or (ii) orienting the ion trajectory, the substrate comprising semiconductor material under a patterned mask layer comprising a plurality of linear mask portions;
• and
• a controller comprising instructions for:
• (a) orienting the substrate with respect to the ion trajectory in the first orientation and directing ions toward the substrate in a first direction, wherein the ions impact the substrate at a first incidence angle to thereby anisotropically etch the semiconductor material on the substrate to form a first set of trenches;
• (b) orienting the substrate with respect to the ion trajectory in a second orientation and directing ions toward the substrate in a second direction, wherein the ions impact the substrate at a second incidence angle to thereby anisotropically etch the semiconductor material to form a second set of trenches;
• (c) repeating (a)-(b) to further etch the first and second sets of trenches to form the channels or nanowires in a direction parallel to the plurality of linear mask portions.

A method of forming channels or nanowires for a gate-all-around device or other electronic device, the method comprising:

• (a) providing a substrate on a substrate holder in a reaction chamber, the substrate comprising a patterned mask layer over semiconductor material, wherein the patterned mask layer comprises a plurality of linear mask portions oriented substantially parallel to one another;
• (b) orienting the substrate with respect to an ion trajectory in a first orientation and directing ions toward the substrate in a first direction, the plurality of linear mask portions protecting a plurality of first shadowed regions, wherein the ions impact the substrate at a first incidence angle to thereby etch the semiconductor material to form a first set of trenches between adjacent first shadowed regions;
• (c) orienting the substrate with respect to the ion trajectory in a second orientation and directing the ions toward the substrate in a second direction, the plurality of linear mask portions protecting a plurality of second shadowed regions, wherein the ions impact the substrate at a second incidence angle to thereby etch the semiconductor material to form a second set of trenches between adjacent second shadowed regions;
• (d) repeating (b)-(c) to further etch the first and second sets of trenches, wherein the first and second set of trenches intersect with one another, wherein the first shadowed regions and second shadowed regions intersect with one another, and wherein the channels or nanowires are formed in a direction parallel to the plurality of linear mask portions, in areas where the first and second shadowed regions intersect with one another.