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US 2016/0111285 A1Published application
Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsAnthony J. Lochtefeld, Matthew T. Currie, Zhiyuan Cheng, James Fiorenza, Glyn Braithwaite, Thomas A. Langdo
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Abstract
Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures.
Claims21
A method comprising:
- forming a trench in a dielectric layer over top surface of a substrate, the substrate comprising a first crystalline semiconductor material, the trench being in the dielectric layer and having a length and a width adjoining the top surface of the substrate, the length being greater than the width;
- forming a second crystalline semiconductor material in the trench and adjacent the first crystalline semiconductor material, the second crystalline semiconductor material being lattice mismatched to the first crystalline semiconductor material, dislocations in the second crystalline semiconductor material arising from the lattice mismatch terminating at a sidewall of the trench, a portion of the second crystalline semiconductor material extending out of the trench to form a fin;
- forming a gate structure over a top of the fin and along a sidewall of the fin;
- and
- forming a source/drain region defined in the fin proximate the gate structure.
2 more elements
A method comprising:
- forming a dielectric layer over a top surface of a substrate, the substrate comprising a first crystalline semiconductor material;
- forming a trench being in the dielectric layer, the trench having a length and a width adjoining the top surface of the substrate, the length being greater than the width;
- forming a second crystalline semiconductor material in the trench and adjacent the first crystalline semiconductor material, the second crystalline semiconductor material being lattice mismatched to the first crystalline semiconductor material, dislocations in the second crystalline semiconductor material arising from the lattice mismatch terminating at a sidewall of the trench;
- forming a third crystalline semiconductor material disposed over the second crystalline semiconductor material, the third crystalline semiconductor material being a different material from the second crystalline semiconductor material;
- and
- forming a device formed at least partially in the third crystalline semiconductor material.
3 more elements
A method comprising:
- forming a dielectric layer having a trench over a top surface of a substrate, the substrate comprising a first crystalline semiconductor material, at least a portion of the first crystalline semiconductor material being in a top surface of the substrate and doped with dopants of a first dopant type, the trench being in the dielectric layer and having a length and a width adjoining the top surface of the substrate, the length being greater than the width;
- and
- forming a second crystalline semiconductor material having a first portion in the trench and adjacent the first crystalline semiconductor material and having a second portion over the first portion, the second crystalline semiconductor material being lattice mismatched to the first crystalline semiconductor material, dislocations in the first portion of the second crystalline semiconductor material arising from the lattice mismatch terminating at a sidewall of the trench, the first portion of the second crystalline semiconductor material being doped with dopants of the first dopant type, the second portion of the second crystalline semiconductor material being doped with dopants of a second dopant type, the second dopant type being opposite from the first dopant type.
Dependencies are inferred from the claim text.