Simultaneous Programming of Many Bits in Flash Memory
AssigneeSpansion LLC
InventorKaoru Mori
Life of this patent
Estimating the term…
Abstract
A semiconductor device includes: a plurality of memory cells; a plurality of local bit lines connected to respective memory cells of the plurality of memory cells; and a first amplifier. The first amplifier receives read data from each local bit line of the plurality of local bit lines and determines a transition speed of an output level of the first amplifier in response to receiving a combination of at least two pieces of read data. The first amplifier transfers, based on the determined transition speed, multivalued data of the read data to a read global bit line.
Claims7
A semiconductor device comprising:
- a plurality of memory cells;
- a plurality of local bit lines connected to respective memory cells of the plurality of memory cells;
- and
- a first amplifier configured to:
- receive read data from each local bit line of the plurality of local bit lines,
- determine a transition speed of an output level of the first amplifier in response to receiving a combination of at least two pieces of read data, and
- transfer multivalued data of the read data to a read global bit line based on the determined transition speed.
A method for transferring data in a semiconductor device comprising a plurality of memory cells and a plurality of local bit lines connected to respective memory cells of the plurality of memory cells, the method comprising:
- receiving read data from each local bit line of the plurality of local bit lines;
- determining a transition speed of a data output level in response to receiving a combination of at least two pieces of read data;
- and
- transferring, based on the determined transition speed, multivalued data of the read data to a read global bit line.
Dependencies are inferred from the claim text.