Nonvolatile semiconductor storage device and rewriting method thereof

A nonvolatile semiconductor storage device comprising:

• a nonvolatile memory array with a plurality of memory cells each of which having a plurality of write conditions;
• a decode circuit that selects at least any one of the memory cells of the nonvolatile memory array;
• a read-out circuit that obtains read-out data from the selected memory cell;
• a rewrite-bit-information generating circuit that generates rewrite-bit information indicating that a data rewrite is needed or not, based on the read-out data and a prepared write data;
• and
• a data rewrite circuit that rewrites the data of the selected memory cell, based on the generated rewrite-bit information,
• wherein,
• the rewrite-bit-information generating circuit has units, each of which is formed of an internal buffer circuit, a selection circuit, and a logic circuit, for each of change patterns of the write conditions of the plurality of memory cells, the internal buffer circuit retains the generated rewrite-bit information,
• the selection circuit selects and outputs any one of the write data and the rewrite-bit information stored in the internal buffer circuit,
• the logic circuit determines the rewrite-bit information based on the read-out data and the output of the selection circuit, in a read-back mode where the selection circuit selects and outputs the write data, when a combination of the read-out data and the write data agrees with the change pattern of the write condition assigned to the logic circuit, the logic circuit determines the rewrite-bit information so as to indicate necessity of a data rewrite, and
• when a combination of the read-out data and the write data does not agree with the change pattern of the write condition assigned to the logic circuit, the logic circuit determines the rewrite-bit information so as to indicate unnecessity of a data rewrite,
• in a verify mode where the selection circuit selects and outputs the rewrite-bit information stored in the internal buffer circuit,
• when the rewrite-bit information stored in the internal buffer circuits indicates that a data rewrite has been performed just before and when the read-out data read again from the selected memory cell does not agree with a post-change expected-value data of the change pattern of the write condition assigned to the logic circuit, the logic circuit determines the rewrite-bit information so as to indicate necessity of once-again data rewrite,
• and when the rewrite-bit information stored in the internal buffer circuit indicates that no data rewrite has been performed just before and/or when the read-out data read again from the selected memory cell agrees with the post-change expected-value data of the change pattern of the write condition assigned to the logic circuit, the logic circuit determines the rewrite-bit information so as to indicate unnecessity of once-again data rewrite.