Resistance variable memory apparatus, read/write circuit unit and operation method thereof
AssigneeSK hynix Inc.
InventorJung Hyuk YOON
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Abstract
A resistance variable memory apparatus may include a memory cell array. The resistance variable memory apparatus may include a read/write circuit unit. The read/write circuit unit may be configured for being controlled so that a reference value for the last verification operation has a different level from reference values for verification operations excluding the last verification operation, while a preset number of program and verification (PNV) cycles are performed in response to a write command for the memory cell array.
Claims24
A resistance variable memory apparatus comprising:
- a memory cell array;
- and
- a read/write circuit unit configured for being controlled so that a reference value for a last verification operation has a different level from reference values for verification operations excluding the last verification operation, while a preset number of program and verification (PNV) cycles are performed in response to a write command for the memory cell array.
A read/write circuit unit comprising:
- a write circuit unit configured to program input data to a selected memory cell in response to a write command;
- and
- a read circuit unit configured for being controlled so that a reference value for a last verification operation has a different level from reference values for verification operations excluding the last verification operation, while a preset number of program and verification (PNV) cycles are performed in response to the write command.
An operating method of a resistance variable memory apparatus including a read/write circuit unit,
- controlling the read/write circuit unit so that a reference value for the last verification operation has a different level from reference values for verification operations excluding the last verification operation, while a preset number of program and verification (PNV) cycles are performed in response to a write command.
Dependencies are inferred from the claim text.