Methods, apparatus, and system for using filler cells in design of integrated circuit devices
AssigneeGlobalfoundries Inc.
InventorsUwe Paul Schroeder, Sushama Davar
Life of this patent
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AssigneeGlobalfoundries Inc.
InventorsUwe Paul Schroeder, Sushama Davar
Estimating the term…
At least one method, apparatus and system disclosed involves circuit layout for an integrated circuit device. A design for an integrated circuit device is received; The design comprises a first functional cell and a second functional cell. The first functional cell is placed on a circuit layout. A determination is made as to whether the first cell comprises a vertical boundary that is electrically floating. A filler cell is placed adjacent to the vertical boundary on the circuit layout in response to determining that the first cell comprises the vertical boundary that is electrically floating. The second functional cell is placed adjacent to the filler cell to form a contiguous active area on the circuit layout.
A method for providing a layout for an integrated circuit device, comprising:
An apparatus for providing a design for an integrated circuit device, the apparatus comprising:
A system, comprising:
The system of claim 19, wherein said first characteristic is indicative of a circuit component at a vertical boundary of said first function cell being electrically floating.
Dependencies are inferred from the claim text.