Method of operating simulator compensating for delay and device for perofmring the same

A non-transitory computer-readable recording medium containing a computer program, executable by a processing device, for compensating for delay to synchronize digital and analog signals a simulator, the computer readable medium comprising:

• a delay calculating code segment for generating one of a rising time and a falling time, and a standard delay format (SDF) file using a first netlist, a timing library and a standard parasitic exchange format (SPEF) file;
• an SDF file converting code segment for adjusting an interconnect delay description included in the SDF file to compensate for delay using the one of the rising time and the falling time;
• and
• a digital simulator code segment for generating an event using a first driving cell according to a compensated interconnect delay description.

A simulator comprising:

• a memory for storing a first netlist, a timing library, and a standard parasitic exchange format (SPEF) file;
• and
• a processor configured to compensate for delay to synchronize digital and analog signals, the processor comprising:
• a delay calculator module for generating one of a rising time and a falling time and a standard delay format (SDF) file using the first netlist, the timing library, and the SPEF file;
• an SDF file converter module for adjusting an interconnect delay description included in the SDF file to compensate for delay using the one of the rising time and the falling time;
• and
• a digital simulator module for generating an event using a first driving cell according to a compensated interconnect delay description.