Data cache and method for data caching
AssigneeEMC Corporation
InventorsTed Huaqi Chen, Tao Zheng
Life of this patent
Estimating the term…
Abstract
Embodiments of the present invention disclose a data cache and a system, a computer program product and a method for data caching, wherein a data cache includes: at least one memory bank adapted for enabling high-speed data access; and at least one converter configured to receive a first instruction for a data access operation, and convert the first instruction to a second instruction compatible with the at least one memory bank so as to perform the data access operation, the first instruction being transmitted from a high-speed bus interface of a host device to the data cache.
Claims20
A data cache, comprising:
- at least one memory bank adapted for enabling high-speed data access;
- and
- at least one converter configured to receive a first instruction for a data access operation, and convert the first instruction to a second instruction compatible with the at least one memory bank so as to perform the data access operation, the first instruction being transmitted from a high-speed bus interface of a host device to the data cache.
A method for data caching, comprising:
- receiving a first instruction for a data access operation, the first instruction being transmitted from a high-speed bus interface of a host device to a data cache;
- and
- converting the first instruction into a second instruction compatible with at least one memory bank so as to perform the data access operation, the at least one memory bank being adapted for enabling high-speed data access.
A computer program product for data caching, computer program product comprising:
- a non-transient computer readable medium encoded with computer executable program code, the code configured to enable the execution of:
- receiving a first instruction for a data access operation, the first instruction being transmitted from a high-speed bus interface of a host device to a data cache;
- and
- converting the first instruction into a second instruction compatible with at least one memory bank so as to perform the data access operation, the at least one memory bank being adapted for enabling high-speed data access.
Dependencies are inferred from the claim text.