Data writing method, memoey control circuit unit and memory storage apparatus

A memory control circuit unit, configured to control a rewritable non-volatile memory, the memory control circuit unit comprising:

• a host interface configured to be coupled to a host system;
• a memory interface configured to be coupled to the rewritable non-volatile memory module, wherein the rewritable non-volatile memory module has a plurality of physical erasing units, and each of the physical erasing units has a plurality of physical programming units;
• a memory management circuit coupled to the host interface and the memory interface;
• a first compression/decompression circuit coupled to the memory management circuit;
• and
• a second compression/decompression circuit coupled to the memory management circuit, wherein the memory management circuit identifies whether data belongs to a first pattern or a second pattern,
• if the data belongs to the first pattern, the first compression/decompression circuit compresses the data to generate compressed data, and the memory management circuit issues a command sequence to write the compressed data into the physical programming units, and
• if the data belongs to the second pattern, the second compression/decompression circuit compresses the data to generate another compressed data, and the memory management circuit issues a command sequence to write the another compressed data into the physical programming units,
• wherein a compression speed of the first compression/decompression circuit is higher than a compression speed of the second compression/decompression circuit, and a data compression rate of the first compression/decompression circuit is lower than a data compression rate of the second compression/decompression circuit.

A memory storage apparatus, comprising:

• a connection interface unit configured to be coupled to a host system;
• a rewritable non-volatile memory module having a plurality of physical erasing units, wherein each of the physical erasing units has a plurality of physical programming units;
• and
• a memory control circuit unit coupled to the connection interface unit and the rewritable non-volatile memory module,
• wherein the memory control circuit unit identifies whether data belongs to a first pattern or a second pattern,
• if the data belongs to the first pattern, the memory control circuit unit uses a first compression/decompression circuit to compress the data to generate compressed data and writes the compressed data into the physical programming units,
• if the data belongs to the second pattern, the memory control circuit unit uses a second compression/decompression circuit to compress the data to generate compressed another compressed data and writes the another compressed data into the physical programming units,
• wherein a compression speed of the first compression/decompression circuit is higher than a compression speed of the second compression/decompression circuit, and a data compression rate of the first compression/decompression circuit is lower than a data compression rate of the second compression/decompression circuit.