In-cell mutual-capacitive touch panel and trace layout thereof

An in-cell mutual-capacitive touch panel, comprising:

• a plurality of pixels, a laminated structure of each pixel comprising:
• a substrate;
• a thin-film transistor layer disposed above the substrate, a first conductive layer and a second conductive layer being integrated in the thin-film transistor layer, wherein the first conductive layer, a source electrode, and a drain electrode are formed simultaneously, and the first conductive layer is only disposed out of an active area of the in-cell mutual-capacitive touch panel, and the second conductive layer is connected with a transparent conductive layer coupled to a common voltage;
• a liquid crystal layer, disposed above the thin-film transistor layer;
• a color filtering layer, disposed above the liquid crystal layer;
• and
• a glass layer, disposed above the color filtering layer;
• wherein horizontal traces of first direction touch electrode and horizontal traces of MFL electrode are disposed at both an upper-side and a lower-side out of the active area of the in-cell mutual-capacitive touch panel respectively, and the horizontal traces of MFL electrode are closer to the active area of the in-cell mutual-capacitive touch panel than the horizontal traces of first direction touch electrode;
• at least one driving IC is disposed out of the active area of the in-cell mutual-capacitive touch panel.